Pixel driving circuit and display panel
The present disclosure provides a pixel driving circuit and a display panel. The pixel drive circuit includes: a data writing sub-circuit, a threshold compensation sub-circuit, a driving sub-circuit and a storage sub-circuit, the data writing sub-circuit includes a fourth transistor, which includes a first electrode connected with a data line, a second electrode connected with a first terminal of the driving sub-circuit, and a control electrode connected with a first scan signal line, and the fourth transistor is an oxide thin film transistor; the threshold compensation sub-circuit is configured to compensate a threshold voltage of the driving sub-circuit in response to a second scan signal; the storage sub-circuit is configured to store a data voltage signal; the driving sub-circuit is configured to provide a driving current for a light emitting device to be driven according to voltages of the first terminal and a control terminal thereof.
1. A pixel driving circuit, comprising: a data writing sub-circuit, a threshold compensation sub-circuit, a driving sub-circuit, a storage sub-circuit and a data voltage supply sub-circuit, wherein
the data writing sub-circuit comprises a fourth transistor, a first electrode of the fourth transistor is connected with a data line, a second electrode of the fourth transistor is connected with a first terminal of the driving sub-circuit, and a control electrode of the fourth transistor is connected with a first scan signal line, and the fourth transistor is an oxide thin film transistor;
the threshold compensation sub-circuit is configured to compensate a threshold voltage of the driving sub-circuit in response to a second scan signal;
the storage sub-circuit is configured to store a data voltage signal plus a threshold voltage of the driving sub-circuit;
the driving sub-circuit is configured to provide a driving current for a light emitting device to be driven according to voltages of the first terminal and a control terminal of the driving sub-circuit; and
the data voltage supply sub-circuit is configured to write a first voltage into the data line in an initialization stage, so that the data writing sub-circuit transmits the first voltage to the first terminal of the driving sub-circuit; the first voltage is greater than or equal to a data voltage corresponding to a maximum brightness value that the light emitting device displays; or, the first voltage is greater than or equal to a data voltage corresponding to a minimum brightness value that the light emitting device displays.
2. The pixel driving circuit according to claim 1 , further comprising: a first reset sub-circuit and a second reset sub-circuit, wherein
the first reset sub-circuit is configured to reset, in response to a first reset signal, the voltage of the control terminal of the driving sub-circuit through a first initialization signal; and
the second reset sub-circuit is configured to reset, in response to a second reset signal, the first electrode of the light emitting device to be driven through a second initialization signal.
3. The pixel driving circuit according to claim 2 , wherein the first reset sub-circuit comprises a first transistor, and the second reset sub-circuit comprises a seventh transistor;
a first electrode of the first transistor is connected with a first initialization signal terminal, a second electrode of the first transistor is connected with the control terminal of the driving sub-circuit, and a control electrode of the first transistor is connected with a first reset signal terminal; and
a first electrode of the seventh transistor is connected with the first electrode of the light emitting device to be driven, a second electrode of the seventh transistor is connected with a second initialization signal terminal, and a control electrode of the seventh transistor is connected with a second reset signal terminal.
4. The pixel driving circuit according to claim 3 , wherein the first transistor is an oxide thin film transistor.
5. The pixel driving circuit according to claim 2 , further comprising:
a first scan control sub-circuit and a second scan control sub-circuit, wherein
the first scan control sub-circuit is configured to provide a first scan signal for the fourth transistor in a data writing and threshold compensation stage;
the second scan control sub-circuit is configured to provide the second scan signal to the threshold compensation sub-circuit in the data writing and threshold compensation stage; and
a start timing of an enabled pulse of the first scan signal in the data writing and threshold compensation stage is earlier than a start timing of an enabled pulse of the second scan signal in the data writing and threshold compensation stage; an ending timing of the enabled pulse of the first scan signal in the data writing and threshold compensation stage is the same as an ending timing of the enabled pulse of the second scan signal in the data writing and threshold compensation stage.
6. The pixel driving circuit according to claim 2 , wherein the driving sub-circuit comprises a third transistor,
a first electrode of the third transistor is connected with the second electrode of the fourth transistor, a second electrode of the third transistor is connected with a second terminal of the threshold compensation sub-circuit, and a control electrode of the second driving transistor is connected with a first terminal of the threshold compensation sub-circuit.
7. The pixel driving circuit according to claim 2 , wherein the threshold compensation sub-circuit comprises a second transistor;
a first electrode of the second transistor is connected with a control terminal of the driving sub-circuit, a second electrode of the second transistor is connected with a second terminal of the driving sub-circuit, and a control electrode of the second transistor is connected with a second scan signal line.
8. The pixel driving circuit according to claim 1 , further comprising: a first light emission control sub-circuit and a second light emission control sub-circuit, wherein
the first light emission control sub-circuit is configured to control, in response to a first light emission control signal, whether a first voltage is written into the first terminal of the driving sub-circuit;
the second light emission control sub-circuit is configured to electrically connect/disconnect, in response to a second light emission control signal, the driving sub-circuit with/from the light emitting device to be driven.
9. The pixel driving circuit according to claim 8 , wherein the first emission control sub-circuit comprises a fifth transistor, and the second emission control sub-circuit comprises a sixth transistor,
a first electrode of the fifth transistor is connected with a first power terminal, a second electrode of the fifth transistor is connected with the first terminal of the driving sub-circuit, and a control electrode of the fifth transistor is connected with a first enable signal terminal; and
a first electrode of the sixth transistor is connected with a second terminal of the driving sub-circuit, a second electrode of the sixth transistor is connected with the first electrode of the light emitting device to be driven, and a control electrode of the sixth transistor is connected with a second enable signal terminal.
10. The pixel driving circuit according to claim 1 , further comprising: an auxiliary sub-circuit, wherein
the auxiliary sub-circuit is configured to reduce a leakage current of the fourth transistor under control of a third scan signal.
11. The pixel driving circuit according to claim 10 , wherein the auxiliary sub-circuit comprises an eighth transistor,
a first electrode of the eighth transistor is connected with the data line, a second electrode of the eighth transistor is connected with the first electrode of the fourth transistor, and a control electrode of the eighth transistor is connected with a third scan signal line.
12. The pixel driving circuit according to claim 1 , further comprising:
a first scan control sub-circuit and a second scan control sub-circuit, wherein
the first scan control sub-circuit is configured to provide a first scan signal for the fourth transistor in a data writing and threshold compensation stage;
the second scan control sub-circuit is configured to provide the second scan signal to the threshold compensation sub-circuit in the data writing and threshold compensation stage; and
a start timing of an enabled pulse of the first scan signal in the data writing and threshold compensation stage is earlier than a start timing of an enabled pulse of the second scan signal in the data writing and threshold compensation stage; an ending timing of the enabled pulse of the first scan signal in the data writing and threshold compensation stage is the same as an ending timing of the enabled pulse of the second scan signal in the data writing and threshold compensation stage.
13. The pixel driving circuit according to claim 12 , wherein a duration of the enabled pulse of the first scan signal in the data writing and threshold compensation stage is 1.2 to 2.0 times a duration of the enabled pulse of the second scan signal in the data writing and threshold compensation stage.
14. The pixel driving circuit according to claim 1 , wherein the driving sub-circuit comprises a third transistor,
a first electrode of the third transistor is connected with the second electrode of the fourth transistor, a second electrode of the third transistor is connected with a second terminal of the threshold compensation sub-circuit, and a control electrode of the third transistor is connected with a first terminal of the threshold compensation sub-circuit.
15. The pixel driving circuit according to claim 1 , wherein the threshold compensation sub-circuit comprises a second transistor;
a first electrode of the second transistor is connected with a control terminal of the driving sub-circuit, a second electrode of the second transistor is connected with a second terminal of the driving sub-circuit, and a control electrode of the second transistor is connected with a second scan signal line.
16. The pixel driving circuit according to claim 15 , wherein the second transistor is an oxide thin film transistor.
17. The pixel driving circuit according to claim 1 , wherein the storage sub-circuit comprises a storage capacitor;
a first terminal of the storage capacitor is connected with a first power terminal, and a second terminal of the storage capacitor is connected with the control terminal of the driving sub-circuit.
18. A display panel, comprising the pixel driving circuit of claim 1 .