IP Library › Granted Patent US 12,242,386
Granted Patent B2
US 12,242,386 · App. 18/316,664 · Granted Mar 4, 2025

Efficient logical to physical mapping updates

Inventors: Dinesh Kumar Agarwal (Bangalore, IN); Leeladhar Agarwal (Rajasthan, IN); Lawrence Vazhapully Jacob (Folsom, CA)
Assignee: Western Digital Technologies, Inc.
G06F12/1009G06F12/0804G06F2212/1021
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Quick Facts
Patent No.
US 12,242,386
App. No.
18/316,664
Filed
May 12, 2023
Granted
Mar 4, 2025
Kind
B2
Examiner
DOAN, KHOA D
Art Unit
2133
USPC
711/206
Abstract

Various devices, such as storage devices or systems are configured to efficiently process and update logical mappings within control table sets. Control table sets are often groupings of logical mapping corresponding to the logical locations of data requested by a host-computing device and the physical locations of the data within the memory array. As data is written and erased, these mappings must be updated within the control table set. Received changes to these mappings are typically stored and updated in two locations: a cache memory and a control table update list. By tracking and marking various control table sets as dirty or having undergone multiple changes, additional received updates can be stored and updated in only the cache memory, bypassing the second control table change list. By only utilizing one method of updating control table sets, processing overhead is reduced and various read or write activities are more efficiently done.

Claims (47)

1. A device comprising a plurality of components, including:

a processor;

a memory array comprising a plurality of memory devices wherein a portion of the memory devices are utilized as cache memory devices;

a plurality of control table sets configured to be stored in cache memory devices or non-cache memory devices; and

a control table set management logic configured to:

receive an update request for a control table set;

access the requested control table set;

determine if the requested control table set is stored within cache memory devices;

determine, in response to the requested control table set being stored in cache memory devices, if the update is compatible; and

updating, in response to the update being compatible, the control table set within the cache memory devices.

2. The device of claim 1 , wherein determination of whether an update is compatible comprises evaluating the specific type of update.

3. The device of claim 2 , wherein the type of update may include a sequential write stream or a burst random write.

4. The device of claim 1 , wherein the control table sets comprise logical to physical mapping data.

5. The device of claim 1 , wherein the device further comprises a control table change list configured to store one or more changes to be applied to the control table set stored within the cache memory devices.

6. The device of claim 5 , wherein the control table change list is not updated in response to the update being compatible.

7. A method of reducing processor usage during update processes, comprising:

receiving an update request for a control table set;

determining that the requested control table set is in cache memory;

analyzing, in response to the control table set being in cache memory, if the control table set is dirty;

incrementing, in response to the control table set being dirty, a counter within a control table change list; and

updating only a control table cache memory.

8. The method of claim 7 , wherein a control table set can be classified as dirty in response to a counter associated with the control set table exceeding a predetermined threshold.

9. The method of claim 8 , wherein the predetermined threshold is associated with previous update requests associated with the control set table.

10. A method of reducing processor usage during update processes, comprising:

receiving an update request for a control table set;

determining that the requested control table set is in cache memory;

analyzing, in response to the control table set being in cache memory, if the control table set is dirty;

verifying, in response to the control table set not being dirty, if the received update request is compatible;

incrementing, in response to the update request being compatible, a dirty threshold counter;

comparing the dirty threshold counter to a predetermined threshold;

merging, in response to the dirty threshold exceeding the dirty threshold, data within a control table change list and the cache memory;

marking the control table set as dirty; and

updating only a control table cache memory.

11. The method of claim 10 , wherein a control table set can be classified as dirty in response to a counter associated with the control set table exceeding a predetermined threshold.

12. The method of claim 11 , wherein the predetermined threshold is associated with previous update requests associated with the control set table.

13. The method of claim 10 , wherein verifying compatibility comprises evaluating the specific type of update request.

14. The device of claim 13 , wherein the type of update request may include a sequential write stream or a burst random write.

15. The device of claim 10 , wherein the control table change list is configured to store one or more changes to be applied to the control table set stored within the cache memory devices.

16. The device of claim 15 , wherein the control table change list is not updated in response to the update being compatible.

17. The method of claim 10 , wherein merging the control table change list comprises applying each of the changes described in the control table change list to the corresponding control table set.

18. The method of claim 10 , wherein the method further includes:

incrementing, in response to receiving an update request for a control table set, a flushable counter associated with the control table set;

receiving a shutdown notification;

comparing the flushable counter to a predetermined flushing threshold; and

flushing, in response to the flushable counter exceeding the predetermined flushing threshold, the control table set.

19. The device of claim 18 , wherein incrementing the flushable counter associated with the control set is done in response to a control table set being updated.

20. The method of claim 18 , wherein the method further includes marking the control table set as not dirty upon completion of the flushing.

Assignments (8)
PARTIAL RELEASE OF SECURITY INTERESTS Recorded Apr 25, 2025
From: JPMORGAN CHASE BANK, N.A., AS AGENT
To: SANDISK TECHNOLOGIES, INC.
Reel/Frame 071382/0001 →
SECURITY AGREEMENT Recorded Apr 25, 2025
From: SANDISK TECHNOLOGIES, INC.
To: JPMORGAN CHASE BANK, N.A., AS COLLATERAL AGENT
Reel/Frame 071050/0001 →
PATENT COLLATERAL AGREEMENT Recorded Aug 23, 2024
From: SANDISK TECHNOLOGIES, INC.
To: JPMORGAN CHASE BANK, N.A., AS THE AGENT
Reel/Frame 068762/0494 →
CHANGE OF NAME Recorded Jun 27, 2024
From: SANDISK TECHNOLOGIES, INC.
To: SANDISK TECHNOLOGIES, INC.
Reel/Frame 067982/0032 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded May 29, 2024
From: WESTERN DIGITAL TECHNOLOGIES, INC.
To: SANDISK TECHNOLOGIES, INC.
Reel/Frame 067567/0682 →
PATENT COLLATERAL AGREEMENT - DDTL LOAN AGREEMENT Recorded Aug 21, 2023
From: WESTERN DIGITAL TECHNOLOGIES, INC.
To: JPMORGAN CHASE BANK, N.A.
Reel/Frame 067045/0156 →
PATENT COLLATERAL AGREEMENT - A&R LOAN AGREEMENT Recorded Aug 21, 2023
From: WESTERN DIGITAL TECHNOLOGIES, INC.
To: JPMORGAN CHASE BANK, N.A.
Reel/Frame 064715/0001 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded May 12, 2023
From: AGARWAL, DINESH KUMAR; AGARWAL, LEELADHAR; JACOB, LAWRENCE VAZHAPULLY
To: WESTERN DIGITAL TECHNOLOGIES, INC.
Reel/Frame 063627/0980 →
Continuity (2)
Provisional Application 63346250 · May 26, 2022
Related Publication 20230385200A1 · Nov 30, 2023
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