IP Library Granted Patent US 12,451,589
Granted Patent B2
US 12,451,589 · App. 18/317,304 · Granted Oct 21, 2025

Antenna package and method for manufacturing an antenna package

Inventors: Kuan-Neng Chen (Hsinchu, TW); Han-Wen Hu (Hsinchu, TW); Yu-Jiu Wang (Hsinchu, TW); Li Han Chang (Hsinchu, TW)
Assignee: TRON FUTURE TECH INC.
H01Q1/2283H01Q1/422H01Q9/0407
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Quick Facts
Patent No.
US 12,451,589
App. No.
18/317,304
Granted
Oct 21, 2025
Kind
B2
Abstract

An antenna package is provided. The antenna package includes a glass substrate, a plurality of antennas, a multi-layer circuit structure, and a plurality of radio frequency chips. The glass substrate has a first surface and a second surface. The plurality of antennas are arranged on the first surface of the glass substrate. The multi-layer circuit structure has a first surface and a second surface. The plurality of radio frequency chips are arranged on the first surface of the multi-layer circuit structure. The second surface of the glass substrate is adhered to the second surface of the multi-layer circuit structure.

Claims (44)

1. An antenna package, comprising:

a glass substrate having a first surface and a second surface; and

a plurality of antennas arranged on the first surface of the glass substrate;

a multi-layer circuit structure having a first surface and a second surface; and

a plurality of radio frequency (RF) chips arranged on the first surface of the multi-layer circuit structure;

wherein the second surface of the glass substrate is adhered to the second surface of the multi-layer circuit structure;

wherein the multi-layer circuit structure comprises:

a core;

a first number of first interconnection layers arranged between the core and the first surface of the multi-layer circuit structure; and

a second number of second interconnection layers arranged between the core and the second surface of the multi-layer circuit structure;

wherein the first interconnection layers comprises a plurality of feed lines at the first surface of the multi-layer circuit structure coupled to the plurality of RF chips; and

wherein the second interconnection layers comprises a ground plane at the second surface of the multi-layer circuit structure.

2. The antenna package of claim 1 , wherein a thickness of each of the first interconnection layers is greater than 50 μm.

3. The antenna package of claim 1 , wherein a summation of the first number and the second number is equal to or fewer than 6.

4. The antenna package of claim 1 , wherein a thickness of the glass substrate is between 300 μm and 1000 μm.

5. The antenna package of claim 1 , further comprising at least one of a first adhesion material applied on the second surface of the multi-layer circuit structure and surrounding the glass substrate, and a second adhesion material applied between the second surface of the glass substrate and the second surface and the multi-layer circuit structure.

6. The antenna package of claim 3 , wherein the plurality of antennas are printed on the first surface of the glass substrate by adopting at least one of gold paste, silver paste, and copper paste.

7. The antenna package of claim 1 , further comprising a molding layer covering the RF chips on the first surface of the multi-layer circuit structure, wherein the molding layer forms a continuous encapsulation to the RF chips.

8. The antenna package of claim 1 , wherein a dielectric portion of the multi-layer circuit structure comprises pre-preg materials, FR-4, or FR-5.

9. The antenna package of claim 1 , wherein an area of the antenna package is greater than 200 mm×200 mm.

10. A method for manufacturing an antenna package, comprising:

providing a glass substrate having a first surface and a second surface;

providing a multi-layer circuit structure having a first surface and a second surface;

adhering the second surface of the glass substrate to the second surface of the multi-layer circuit structure; and

arranging a plurality of antennas on the first surface of the glass substrate;

wherein the multi-layer circuit structure comprises:

a core;

a first number of first interconnection layers arranged between the core and the first surface of the multi-layer circuit structure; and

a second number of second interconnection layers arranged between the core and the second surface of the multi-layer circuit structure;

wherein the first interconnection layers comprises a plurality of feed lines at the first surface of the multi-layer circuit structure coupled to the plurality of RF chips; and

wherein the second interconnection layers comprises a ground plane at the second surface of the multi-layer circuit structure.

11. The method of claim 10 , further comprising:

arranging a plurality of radio frequency (RF) chips on the first surface of the multi-layer circuit structure by flip chip operations after adhering the glass substrate to the multi-layer circuit structure.

12. The method of claim 11 , further comprising:

encapsulating the plurality of RF chips by a single molding operation after adhering the glass substrate to the multi-layer circuit structure.

13. The method of claim 12 , wherein the single molding operation comprises:

applying a molding material on the first surface of the multi-layer circuit structure; and

curing the molding material.

14. The method of claim 10 , wherein adhering the glass substrate to the multi-layer circuit structure comprises at least one of:

applying a first adhesion material on the second surface of the multi-layer circuit structure and surrounding the glass substrate; and

applying a second adhesion material between the second surface of the glass substrate on the second surface of the multi-layer circuit structure.

15. The method of claim 10 , wherein adhering the glass substrate to the multi-layer circuit structure comprises performing a dry film lamination operation.

16. The method of claim 10 , further comprising:

forming a protective layer on the first surface of the glass substrate to protect the plurality of antennas prior to the adhering operation.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded May 15, 2023
From: CHEN, KUAN-NENG; HU, HAN-WEN; WANG, YU-JIU; CHANG, LI HAN
To: TRON FUTURE TECH INC.
Reel/Frame 063641/0461 →
Continuity (2)
Provisional Application 63486103 · Feb 21, 2023
Related Publication 20240283130A1 · Aug 22, 2024
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