IP Library › Granted Patent US 12,733,497
Granted Patent B2
US 12,733,497 · App. 18/324,362 · Granted Sep 8, 2026

Method of direct cooling using a conductive strip

Inventors: Ingoo Kang (Gwangsan-gu, KR); Oseob Jeon (Seoul, KR); Seungwon Im (Bucheon, KR)
Assignee: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC
H10W40/47H10W70/05H10W90/00H10W72/5524H10W90/753H10W90/754
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Quick Facts
Patent No.
US 12,733,497
App. No.
18/324,362
Granted
Sep 8, 2026
Kind
B2
Abstract

A package includes a semiconductor die disposed on a three-layer substrate. The three-layer substrate includes a ceramic layer disposed between a top metal layer and a bottom metal layer. The semiconductor die is disposed on the top metal layer. An array of mesas is defined in the bottom metal layer with grooves between the mesas forming a path for cooling fluid flow across a surface of the bottom metal layer.

Claims (43)

1 . A method, comprising:

forming an array of mesas in a bottom metal layer of a three-layer direct bonded metal (DBM) substrate to increase a surface area of the bottom metal layer, the array of mesas including a plurality of rows of mesas;

attaching at least one strip of a plurality of strips to a corresponding one of the plurality of rows of mesas, wherein the strip is a corrugated strip including flat coupling portions connected by curved bridging portions, and wherein attaching the strip includes aligning and bonding the flat coupling portions of the strip to the top surfaces of the mesas while the curved bridging portions extend over grooves between adjacent mesas in the row of mesas;

disposing a semiconductor die on a top metal layer of the three-layer DBM substrate; and

exposing the bottom metal layer of the three-layer DBM substrate through a bottom of a mold body encapsulating the semiconductor die.

2 . The method of claim 1 , wherein the bottom metal layer of the three-layer DBM substrate is a copper layer that is at least 1.0 mm thick.

3 . The method of claim 1 , wherein forming the array of mesas in the bottom metal layer includes etching a first set of parallel grooves and etching a second set of parallel grooves intersecting the first set of parallel grooves in the bottom metal layer.

4 . The method of claim 3 , wherein the etching includes defining a path for cooling fluid flow through grooves along sides of the mesas in the array of mesas.

5 . The method of claim 4 , wherein mesas in a first row of mesas are offset from corresponding mesas in an adjacent row of mesas by an offset distance, and wherein the etching includes defining a serpentine path for cooling fluid flow through grooves along and around the sides of mesas in the array of mesas.

6 . The method of claim 1 , wherein attaching at least one strip of a plurality of strips includes, for each of the plurality of rows of mesas, attaching a strip to top surfaces of the mesas in the row of mesas.

7 . The method of claim 6 , wherein the strip is made of metal, and has a width that is a same as, or about the same as, a length of the mesas in direction perpendicular to a direction of the row.

8 . The method of claim 4 , wherein exposing the bottom metal layer of the three-layer DBM substrate through the bottom of the mold body further includes attaching a cooling jacket to the bottom of the mold body to enclose the bottom metal layer.

9 . The method of claim 6 , wherein the strip is a conductive strip having a thickness in a range of 0.1 mm to 0.4 mm.

10 . A method, comprising:

forming a set of mesas in a bottom metal layer of a substrate, the set of mesas including at least one row of mesas defined by a plurality of parallel grooves extending in a first direction;

attaching a corrugated strip across the at least one row of mesas, the corrugated strip including a plurality of flat coupling portions and a plurality of curved bridging portions, each curved bridging portion extending over a respective groove between adjacent mesas;

disposing a semiconductor die on a top metal layer of the substrate; and

exposing the bottom metal layer of the substrate through a bottom of a mold body encapsulating the semiconductor die.

11 . The method of claim 10 , wherein attaching a corrugated strip across the at least one row of mesas includes:

bonding the plurality of flat coupling portions to respective surfaces of the at least one row of mesas.

12 . The method of claim 10 , wherein the plurality of parallel grooves is a first plurality of parallel grooves, and wherein the at least one row of mesas includes a first row of mesas defined by the first plurality of parallel grooves and a second row of mesas defined by a second plurality of parallel grooves extending in the first direction, the second plurality of parallel grooves being unaligned with the first plurality of parallel grooves.

13 . The method of claim 12 , wherein the first row of mesas is separated from the second row of mesas by a transverse groove extending in a second direction orthogonal to the first direction.

14 . The method of claim 12 , wherein the corrugated strip is a first corrugated strip and the plurality of curved bridging portions is a first plurality of curved bridging portions, and wherein attaching a corrugated strip across the at least one row of mesas includes:

attaching the first corrugated strip across the first row of mesas; and

attaching a second corrugated strip across the second row of mesas, the second corrugated strip including a plurality of curved bridging portions that are unaligned with the first plurality of curved bridging portions in the first direction.

15 . The method of claim 10 , wherein mesas in the at least one row of mesas have a length in the first direction, and wherein the corrugated strip has a width in the first direction that is a same as, or about the same as, the length of the mesas.

16 . The method of claim 10 , wherein exposing the bottom metal layer of the substrate through the bottom of the mold body further includes attaching a cooling jacket to the bottom of the mold body to enclose the bottom metal layer.

17 . A method, comprising:

forming an array of mesas in a bottom metal layer of a substrate, each mesa in the array being separated from an adjacent mesa by a corresponding groove;

attaching a corrugated strip to at least a first mesa and a second mesa of the array of mesas, the corrugated strip including:

a first flat coupling portion coupled to a surface of the first mesa;

a second flat coupling portion coupled to a surface of the second mesa; and

a curved bridging portion connecting the first flat coupling portion and the second flat coupling portion, the curved bridging portion extending over a groove separating the first mesa and the second mesa, wherein the groove and a surface of the curved bridging portion define a fluid channel; and

disposing a semiconductor die on a top metal layer of the substrate.

18 . The method of claim 17 further comprising:

exposing the bottom metal layer of the substrate through a bottom of a mold body encapsulating the semiconductor die; and

attaching a cooling jacket the bottom of the mold body to enclose the bottom metal layer.

19 . The method of claim 17 , wherein the groove is a first groove and the curved bridging portion is a first curved bridging portion, the corrugated strip including:

a third flat coupling portion coupled to a surface of a third mesa; and

a second curved bridging portion connecting the second flat coupling portion and the third flat coupling portion, the second curved bridging portion extending over a second groove separating the second mesa and the third mesa.

20 . The method of claim 19 , wherein the fluid channel is a first fluid channel, and wherein the second groove and a surface of the second curved bridging portion define a second fluid channel.

21 . The method of claim 17 , wherein the mesas have a length in a first direction, and wherein the corrugated strip has a width in the first direction that is a same as, or about the same as, the length of the mesas.

22 . The method of claim 17 , wherein a mesa in the array of mesas has a rectangular or square cross section with a width in a range of 2.0 mm to 4.0 mm and a length in a range of a range of 2.0 mm to 4.0 mm.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded May 31, 2023
From: KANG, INGOO; JEON, OSEOB; IM, SEUNGWON
To: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC
Reel/Frame 063814/0610 →
Continuity (1)
Related Publication 20240395662A1 · Nov 28, 2024
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