IP Library Granted Patent US 12,176,303
Granted Patent B2
US 12,176,303 · App. 18/346,396 · Granted Dec 24, 2024

Wafer-level bonding of obstructive elements

Inventors: Javier A. DeLaCruz (San Jose, CA); Rajesh Katkar (Milpitas, CA)
Assignee: Adeia Semiconductor Bonding Technologies Inc.
H01L23/573H01L24/05H01L24/48H01L24/83H01L24/94H01L2224/04042H01L2224/83896
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Quick Facts
Patent No.
US 12,176,303
App. No.
18/346,396
Granted
Dec 24, 2024
Kind
B2
Abstract

A bonded structure is disclosed. The bonded structure can include a semiconductor element comprising active circuitry. The bonded structure can include an obstructive element bonded to the semiconductor element along a bond interface, the obstructive element including an obstructive material disposed over the active circuitry, the obstructive material configured to obstruct external access to the active circuitry. The bonded element can include an artifact structure indicative of a wafer-level bond in which the semiconductor element and the obstructive element formed part of respective wafers directly bonded prior to singulation.

Claims (24)

1. A bonded structure comprising:

a semiconductor element comprising active circuitry;

an obstructive element bonded to the semiconductor element along a bond interface, the obstructive element including an obstructive material disposed over the active circuitry, the obstructive material configured to obstruct external access to the active circuitry, the obstructive material comprising a light-modifying material; and

an artifact structure indicative of a wafer-level bond in which the semiconductor element and the obstructive element formed part of respective wafers directly bonded prior to singulation.

2. The bonded structure of claim 1 , wherein the light-modifying material comprises a light-blocking material.

3. The bonded structure of claim 2 , wherein the light-blocking material is configured to block light at wavelengths in a range of 700 nm to 1 mm.

4. The bonded structure of claim 1 , wherein the light-modifying material comprises an optical filter.

5. The bonded structure of claim 1 , wherein the obstructed element is directly bonded to the semiconductor element without an intervening adhesive.

6. The bonded structure of claim 5 , wherein the obstructive element is hybrid bonded to the semiconductor element without an intervening adhesive.

7. A method for forming a bonded structure, the method comprising:

bonding a semiconductor element having active circuitry to a wafer, the wafer comprising an obstructive material configured to obstruct external access to the active circuitry, the obstructive material comprising a light-modifying material; and

after the bonding, singulating the wafer to form a plurality of singulated bonded structures.

8. The method of claim 7 , wherein the light-modifying material comprises a light-blocking material.

9. The method of claim 8 , wherein the light-blocking material is configured to block light at wavelengths in a range of 700 nm to 1 mm.

10. The method of claim 7 , wherein the light-modifying material comprises an optical filter.

11. The method of claim 7 , wherein bonding comprises directly bonding the semiconductor element to the wafer without an intervening adhesive.

12. The method of claim 11 , wherein the semiconductor element comprises a second wafer that includes the active circuitry, the method comprising singulating the second wafer after the directly bonding.

13. The method of claim 11 , further comprising, after the directly bonding, forming a trench through a back side of the wafer through the obstructive material to a bond pad on the semiconductor element.

14. The method of claim 13 , further comprising connecting a bond wire to the bond pad within the trench.

15. The method of claim 13 , further comprising connecting a bond wire to a trace at the back side of the wafer, the trace connected to the bond pad within the trench.

16. The method of claim 7 , wherein singulating the wafer comprises etching the wafer to form the plurality of singulated bonded structures.

17. The method of claim 7 , wherein singulating the wafer comprises sawing the wafer to form the plurality of singulated bonded structures.

18. The method of claim 7 , further comprising forming the semiconductor element before the bonding.

19. The method of claim 11 , wherein directly bonding comprises hybrid bonding the semiconductor element to the wafer.

Assignments (2)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Nov 4, 2024
From: DELACRUZ, JAVIER A.; KATKAR, RAJESH
To: INVENSAS BONDING TECHNOLOGIES, INC.
Reel/Frame 069128/0309 →
CHANGE OF NAME Recorded Nov 4, 2024
From: INVENSAS BONDING TECHNOLOGIES, INC.
To: ADEIA SEMICONDUCTOR BONDING TECHNOLOGIES INC.
Reel/Frame 069301/0877 →
Continuity (7)
Continuation 17454971 · Nov 15, 2021
Continuation 16846177 · Apr 10, 2020
Provisional Application 62953106 · Dec 23, 2019
Provisional Application 62953058 · Dec 23, 2019
Provisional Application 62875370 · Jul 17, 2019
Provisional Application 62833491 · Apr 12, 2019
Related Publication 20240079351A1 · Mar 7, 2024
Cited By (2)
US 12,451,439 US 12,451,445