IP Library Granted Patent US 12,394,566
Granted Patent B2
US 12,394,566 · App. 18/361,072 · Granted Aug 19, 2025

Snap fit bracket for electrolytic capacitors

Inventors: Shiqiang Sun (Shenzhen, CN); Ning Ye (San Jose, CA); Lihwa Fong (Irvine, CA)
Assignee: Sandisk Technologies, Inc.
H01G2/06H05K1/181H05K2201/10015H05K2201/10628
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Quick Facts
Patent No.
US 12,394,566
App. No.
18/361,072
Granted
Aug 19, 2025
Kind
B2
Abstract

A snap fit bracket for a capacitor slideably couples the capacitor to an opening defined by a substrate. The snap fit bracket includes four sidewalls that form a perimeter. The perimeter defines an opening into which the capacitor is horizontally positioned. A first channel is provided on a first side of the snap fit bracket and a second channel is provided on a second side of the snap fit bracket. Each of the first channel and the second channel are slideably coupled to respective edges within the opening of the substrate. A snap fit fastener is included in one or both of the first channel and the second channel. A portion of the snap fit fastener is received into a notch that is provided within the opening of the substrate which secures the snap fit bracket to the substrate.

Claims (44)

1. A bracket for mounting a capacitor to a substrate, comprising:

a first sidewall;

a second sidewall opposite the first sidewall;

a proximal wall extending between a proximal end of the first sidewall and a proximal end of the second sidewall;

a distal wall extending between a distal end of the first sidewall and a distal end of the second sidewall, the first sidewall, the second sidewall, the proximal wall and the distal wall defining an opening;

a first flange and a second flange extending from the proximal wall and forming a first channel that receives a first edge of a substrate;

a third flange and a fourth flange extending from the distal wall and forming a second channel that receives a second edge of the substrate;

a first fastener disposed within the first channel, the first fastener comprising:

a cantilever beam; and

a protrusion extending from a distal end of the cantilever beam, the protrusion causing the cantilever beam to move from a first position to a second position when the first channel receives the first edge of the substrate; and

a second fastener disposed within the second channel.

2. The bracket of claim 1 , wherein the protrusion is received by a notch defined by the first edge of the substrate when the cantilever beam moves from the second position back to the first position.

3. The bracket of claim 1 , further comprising an aperture defined by the distal wall, the aperture receiving a lead of the capacitor when the capacitor is placed in the opening.

4. The bracket of claim 1 , further comprising a first ledge provided on an inner portion of the first sidewall and a second ledge provided on an inner portion of the second sidewall, each of the first ledge and the second ledge supporting the capacitor when the capacitor is received in the opening.

5. The bracket of claim 1 , further comprising a first ridge extending from a top surface of the first sidewall and a second ridge extending from a top surface of the second sidewall.

6. The bracket of claim 5 , wherein the first ridge and the second ridge are rounded.

7. A semiconductor package, comprising:

a substrate defining an opening;

a notch disposed on a first edge of the substrate within the opening;

a bracket for a capacitor provided within the opening, the bracket comprising:

a first sidewall;

a second sidewall;

a proximal wall extending between a proximal end of the first sidewall and a proximal end of the second sidewall;

a distal wall extending between a distal end of the first sidewall and a distal end of the second sidewall, the first sidewall, the second sidewall, the proximal wall and the distal wall defining a bracket opening;

a first flange and a second flange extending from the proximal wall and forming a first channel that is slideably coupled to the first edge of the substrate;

a third flange and a fourth flange extending from the distal wall and forming a second channel that is slideably coupled to a second edge of the substrate; and

a snap fit fastener disposed within the first channel, the snap fit fastener comprising a cantilever beam having a protrusion extending from a distal end, the protrusion causing the cantilever beam to move from a first position to a second position as the bracket is slideably coupled to the substrate.

8. The semiconductor package of claim 7 , further comprising an electrolytic capacitor horizontally positioned within the bracket opening.

9. The semiconductor package of claim 8 , further comprising an aperture defined by the distal wall, the aperture receiving a lead of the electrolytic capacitor when the electrolytic capacitor is horizontally positioned within the bracket opening.

10. The semiconductor package of claim 8 , further comprising a first ledge provided on an inner portion of the first sidewall and a second ledge provided on an inner portion of the second sidewall, each of the first ledge and the second ledge supporting the electrolytic capacitor when the electrolytic capacitor is horizontally positioned within the bracket opening.

11. The semiconductor package of claim 8 , further comprising an aperture defined by the distal wall, the aperture receiving a lead of the electrolytic capacitor when the electrolytic capacitor is horizontally positioned within the bracket opening.

12. The semiconductor package of claim 7 , wherein the protrusion that extends from a distal end of the cantilever beam is received by the notch when the cantilever beam moves from the second position back to the first position.

13. The semiconductor package of claim 7 , further comprising a first ridge extending from a top surface of the first sidewall and a second ridge extending from a top surface of the second sidewall.

14. The semiconductor package of claim 7 , further comprising one or more pads provided on a surface of the substrate proximate to the opening.

15. A bracket for mounting a capacitor to a substrate, comprising:

a body defining an opening;

a first coupling means provided on a proximal end of the body;

a second coupling means provided on a distal end of the body, the first coupling means and the second coupling means for coupling the bracket to an opening defined by a substrate; and

a fastening means for securing the bracket within the opening defined by the substrate, the fastening means comprising a cantilever beam having a protrusion extending from a distal end, the protrusion causing the cantilever beam to move from a first position to a second position as the bracket is coupled to the opening defined by the substrate.

16. The bracket of claim 15 , further comprising a support means provided within the opening, the support means for supporting an electronic component when the electronic component is positioned within the opening of the body.

17. The bracket of claim 15 , wherein the protrusion is tapered.

18. The bracket of claim 15 , wherein the protrusion is received by a notch when the cantilever beam moves from the second position back to the first position.

19. The bracket of claim 15 , further comprising an aperture defined by the body, the aperture receiving a lead of an electronic component when the electronic component is placed in the opening.

20. The bracket of claim 15 , wherein the first coupling means defines a channel that receives at least a portion of the substrate.

Assignments (8)
PARTIAL RELEASE OF SECURITY INTERESTS Recorded Apr 25, 2025
From: JPMORGAN CHASE BANK, N.A., AS AGENT
To: SANDISK TECHNOLOGIES, INC.
Reel/Frame 071382/0001 →
SECURITY AGREEMENT Recorded Apr 25, 2025
From: SANDISK TECHNOLOGIES, INC.
To: JPMORGAN CHASE BANK, N.A., AS COLLATERAL AGENT
Reel/Frame 071050/0001 →
PATENT COLLATERAL AGREEMENT Recorded Aug 23, 2024
From: SANDISK TECHNOLOGIES, INC.
To: JPMORGAN CHASE BANK, N.A., AS THE AGENT
Reel/Frame 068762/0494 →
CHANGE OF NAME Recorded Jun 27, 2024
From: SANDISK TECHNOLOGIES, INC.
To: SANDISK TECHNOLOGIES, INC.
Reel/Frame 067982/0032 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded May 29, 2024
From: WESTERN DIGITAL TECHNOLOGIES, INC.
To: SANDISK TECHNOLOGIES, INC.
Reel/Frame 067567/0682 →
PATENT COLLATERAL AGREEMENT - DDTL Recorded Nov 21, 2023
From: WESTERN DIGITAL TECHNOLOGIES, INC.
To: JPMORGAN CHASE BANK, N.A.
Reel/Frame 065657/0158 →
PATENT COLLATERAL AGREEMENT- A&R Recorded Nov 21, 2023
From: WESTERN DIGITAL TECHNOLOGIES, INC.
To: JPMORGAN CHASE BANK, N.A.
Reel/Frame 065656/0649 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jul 28, 2023
From: SUN, KEN; YE, NING; FONG, LIHWA
To: WESTERN DIGITAL TECHNOLOGIES, INC.
Reel/Frame 064422/0135 →
Continuity (2)
Provisional Application 63506742 · Jun 7, 2023
Related Publication 20240412922A1 · Dec 12, 2024
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