Providing host with multiple mapping information that span across multiple HPB regions
A storage device minimizes HPB entry inactivation resulting from data associated with hot reads being retrieved from multiple HPB sub-regions covering a logical-to-physical table. The storage device may support the HPB feature and a multiple HPB sub-region mode. The storage device includes a controller that tracks a hit count associated with a logical block address in a read command. The controller determines that the hit count has reached a hit threshold and updates a hit table to identify logical block address pages associated with hit counts that have reached the hit threshold across HPB sub-regions covering a logical-to-physical table. The controller transmits the hit table to a host device to be stored in an HPB cache on the host device and to be used by the host device for read commands sent from the host device to the storage device.
1. A storage device to support a host performance booster (HPB) feature and a multiple HPB sub-region mode, the storage device is communicatively coupled to a host device including an HPB cache, the storage device comprises:
a controller to track a hit count associated with a logical block address, determine that the hit count has reached a hit threshold, update a hit table to identify logical block address pages, associated with hit counts that have reached the hit threshold, across HPB sub-regions covering a logical-to-physical table, and transmit the hit table to a host device to be stored in an HPB cache on the host device and the hit table to be used by the host device for read commands sent from the host device to the storage device.
2. The storage device of claim 1 , wherein the hit table includes the logical block address, an associated physical block address, and a run length for logical block addresses associated with hot reads and wherein entries in the hit table include logical block addresses from HPB sub-regions covering the logical-to-physical table.
3. The storage device of claim 1 , wherein the controller updates the hit count associated with the logical block address when a read command from the host device includes the logical block address.
4. The storage device of claim 1 , wherein the storage device sets the hit threshold in device-controlled mode.
5. The storage device of claim 1 , wherein the host device sets the hit threshold in a host-controlled mode and transmits the hit threshold to the storage device.
6. The storage device of claim 1 , wherein the storage device sorts and assigns weights to entries in the hit table.
7. The storage device of claim 1 , wherein when a size of the hit table is equivalent to a predefined size, the storage device notifies the host device to read the hit table and the storage device notifies the host device i) that the storage device is operating in the multiple HPB sub-region mode and ii) that entries in the hit table are from HPB sub-regions covering the logical-to-physical table.
8. The storage device of claim 1 , wherein the storage device i) sends an indication to the host device when an entry in the hit table is invalidated and ii) provides a predefined number of new mappings, for invalidated entries in the hit table, in a response buffer.
9. The storage device of claim 1 , wherein the storage device sends an indication to the host device when a predefined number of entries in the hit table are invalidated, the indication being for the host device to invalidate the entries in the HPB cache.
10. The storage device of claim 1 , wherein when the storage device receives an HPB write buffer command with a first predefined buffer identification from the host device, the storage device invalidates entries in the hit table.
11. The storage device of claim 1 , wherein when the storage device receives an HPB write buffer command with a second predefined buffer identification from the host device, the storage device invalidates a specific entry in the hit table.
12. A method for minimizing host performance booster (HPB) entry inactivation resulting from data associated with hot reads being retrieved from multiple HPB sub-regions covering a logical-to-physical table, the method comprising:
activating a storage device to support an HPB feature in a multiple HPB sub-region mode;
tracking, by a controller, a hit count associated with a logical block address in a read command received from a host device;
determining, by the controller, that the hit count has reached a hit threshold;
updating, by the controller, a hit table to identify logical block address pages, associated with hit counts that have reached the hit threshold, across HPB sub-regions covering a logical-to-physical table; and
transmitting, by the controller, the hit table to the host device to be stored in an HPB cache on the host device and the hit table to be used by the host device for read commands sent from the host device to the storage device.
13. The method of claim 12 , further comprising updating, by the controller, the hit count associated with the logical block address when a read command from the host includes the logical block address.
14. The method of claim 12 , further comprising sorting and assigning weights, by the controller, to entries in the hit table.
15. The method of claim 12 , further comprising notifying, by the controller, the host device to read the hit table in response to a size of the hit table being equivalent to a predefined size, wherein the notifying includes an indication i) that the storage device is operating in the multiple HPB sub-region mode and ii) that entries in the hit table are from HPB sub-regions covering the logical-to-physical table.
16. The method of claim 12 , further comprising sending, by the controller, an indication to the host device in response to an entry in the hit table being invalidated and the controller providing a predefined number of new mappings, for invalidated entries, in the hit table in a response buffer.
17. The method of claim 12 , further comprising sending, by the controller, an indication to the host device in response a predefined number of entries in the hit table being invalidated, wherein the indication is for the host device to invalidate the entries in the HPB cache.
18. The method of claim 12 , further comprising invalidating, by the controller, entries in the hit table in response to the storage device receiving an HPB write buffer command, with a first predefined buffer identification, from the host device.
19. The method of claim 12 , further comprising invalidating, by the controller, a specific entry in the hit table in response to the storage device receiving an HPB write buffer command, with a second predefined buffer identification, from the host device.
20. A method for minimizing host performance booster (HPB) entry inactivation resulting from data associated with hot reads being retrieved from multiple HPB sub-regions covering a logical-to-physical table and for updating a HPB cache after performing background operations, the method comprising:
activating a storage device to support an HPB feature in a multiple HPB sub-region mode;
tracking, by a controller, a hit count associated with a logical block address in a read command received from a host device;
determining, by the controller, that the hit count has reached a hit threshold;
updating, by the controller, a hit table to identify logical block address pages, associated with hit counts that have reached the hit threshold, across HPB sub-regions covering a logical-to-physical table;
transmitting, by the controller, the hit table to the host device to be stored in an HPB cache on the host device and to be used by the host device for read commands sent from the host device to the storage device; and
performing, by the controller, a background operation, sending an indication to the host device that an entry in the HPB cache is invalid, and providing one of i) an indication for the host device to invalidate the entries in the HPB cache and ii) a predefined number of new mappings, for invalidated entries, in the hit table in a response buffer.