IP Library › Granted Patent US 12,489,211
Granted Patent B2
US 12,489,211 · App. 18/429,140 · Granted Dec 2, 2025

Electronic device with patch antenna in packaging substrate

Inventors: Harshpreet Singh Phull Bakshi (Dallas, TX); Rajen Manicon Murugan (Dallas, TX); Sylvester Ankamah-Kusi (Dallas, TX)
Assignee: TEXAS INSTRUMENTS INCORPORATED
H01Q9/0407H01Q1/2283H01Q1/38H01Q1/422
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Quick Facts
Patent No.
US 12,489,211
App. No.
18/429,140
Granted
Dec 2, 2025
Kind
B2
Abstract

An electronic device includes a multilevel package substrate, a semiconductor die, and a package structure, the multilevel package substrate has first, second, and third levels including respective dielectric layers and conductive features, the first level including a first trace layer with an antenna and a first via layer with a portion of a ground wall laterally spaced outward from and surrounding the antenna, and the second level including a second trace layer having a ground plane connected to the ground wall, the semiconductor die attached to the first level of the multilevel package substrate, and the package structure including a molding compound enclosing the semiconductor die and extending on a side of the antenna, where the package structure mold compound maters and thickness can be tuned for improved performance.

Claims (37)

1 . An electronic device, comprising:

a multilevel package substrate having a first level, a second level, and a third level, the first, second, and third levels each including a respective dielectric layer and patterned conductive features, the first, second, and third levels extending in respective first, second, and third planes of a first direction and an orthogonal second direction, the second level between the first and third levels along a third direction that is orthogonal to the first and second directions, the first level including a first trace layer with an antenna and a first via layer with a portion of a ground wall laterally spaced outward from and surrounding the antenna, and the second level including a second trace layer having a ground plane connected to the ground wall;

a semiconductor die attached to the first level of the multilevel package substrate; and

a package structure including a molding compound enclosing the semiconductor die and extending on a side of the antenna.

2 . The electronic device of claim 1 , wherein the first trace layer includes a second portion of the ground wall laterally spaced from and surrounding the antenna in the first plane.

3 . The electronic device of claim 1 , wherein the multilevel package substrate includes metal studs on first trace level for antenna and ground wall connections.

4 . The electronic device of claim 1 , wherein the multilevel package substrate includes conductive leads in the third level.

5 . The electronic device of claim 1 , wherein:

the semiconductor die is configured to operate the antenna at a wavelength λ; and

the molding compound has a thickness along the third direction of 0.125λ or more over the antenna.

6 . The electronic device of claim 5 , wherein the thickness of the molding compound is approximately 0.25λ.

7 . The electronic device of claim 5 , wherein the thickness of the molding compound is approximately λ/4+n λ/2, where n is a positive integer.

8 . The electronic device of claim 5 , wherein the thickness of the molding compound is λ/4+/−30%.

9 . The electronic device of claim 1 , wherein the molding compound has a loss tangent value less than 0.02.

10 . The electronic device of claim 9 , wherein the loss tangent value of the molding compound is approximately 0.001 or more and approximately 0.01 or less.

11 . A system, comprising:

a circuit board; and

an electronic device, comprising:

a multilevel package substrate having a first level, a second level, and a third level, the first, second, and third levels each including a respective dielectric layer and respective patterned conductive features, the first, second, and third levels extending in respective first, second, and third planes of a first direction and an orthogonal second direction, the second level between the first and third levels along a third direction that is orthogonal to the first and second directions, the first level including a first trace layer with an antenna and a first via layer with a portion of a ground wall laterally spaced outward from and surrounding the antenna, the second level including a second trace layer having a ground plane connected to the ground wall, and the multilevel package substrate having conductive leads coupled to the circuit board;

a semiconductor die attached to the first level of the multilevel package substrate; and

a package structure including a molding compound enclosing the semiconductor die and extending on a side of the antenna.

12 . The system of claim 11 , wherein the first trace layer includes a second portion of the ground wall laterally spaced from and surrounding the antenna in the first plane.

13 . The system of claim 11 , wherein:

the semiconductor die is configured to operate the antenna at a wavelength λ; and

the molding compound has a thickness along the third direction of 0.125λ or more over the antenna.

14 . The system of claim 11 , wherein the molding compound has a loss tangent value less than 0.02.

15 . A method of fabricating an electronic device, the method comprising:

fabricating a multilevel package substrate, including forming a first level, a second level, and a third level, the first, second, and third levels each including a respective dielectric layer and respective patterned conductive features, the second level between the first and third levels, the first level including a first trace layer with an antenna and a first via layer with a portion of a ground wall laterally spaced outward from and surrounding the antenna, and the second level including a second trace layer having a ground plane connected to the ground wall;

flip-chip attaching a semiconductor die to the first level of the multilevel package substrate; and

forming a package structure including a molding compound that encloses the die and extends on a side of the antenna.

16 . The method of claim 15 , wherein the first trace layer includes a second portion of the ground wall laterally spaced from and surrounding the antenna.

17 . The method of claim 15 , wherein:

the semiconductor die is configured to operate the antenna at a wavelength λ; and

the molding compound has a thickness of 0.125λ or more over the antenna.

18 . The method of claim 17 , wherein the thickness of the molding compound is approximately 0.25λ.

19 . The method of claim 17 , wherein the thickness of the molding compound is approximately λ/4+n λ/2, where n is a positive integer.

20 . The method of claim 15 , wherein the molding compound has a loss tangent value less than 0.02.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Feb 1, 2024
From: BAKSHI, HARSHPREET SINGH PHULL; MURUGAN, RAJEN MANICON; ANKAMAH-KUSI, SYLVESTER
To: TEXAS INSTRUMENTS INCORPORATED
Reel/Frame 066318/0386 →
Continuity (2)
Provisional Application 63490382 · Mar 15, 2023
Related Publication 20240313404A1 · Sep 19, 2024
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