IP Library › Granted Patent US 12,537,539
Granted Patent B2
US 12,537,539 · App. 18/471,437 · Granted Jan 27, 2026

Successive approximation analog-to-digital conversion device skipping comparison results and its operating method

Inventors: Chulwoo Kim (Seoul, KR); Sooho Park (Seoul, KR); Yohan Choi (Seoul, KR); Chang Joo Kim (Seoul, KR)
Assignee: Korea University Research and Business Foundation
H03M1/462H03M1/1245
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Quick Facts
Patent No.
US 12,537,539
App. No.
18/471,437
Granted
Jan 27, 2026
Kind
B2
Abstract

The analog-to-digital conversion device includes a signal generating unit that generates a plurality of comparison voltages based on an analog input voltage and generates a plurality of comparison results of the plurality of comparison voltages based on a sampling period, a calculation unit that skips a comparison result generated by a comparison voltage having a smallest difference between the analog input voltages among the plurality of comparison voltages from the plurality of comparison results and generates an end of comparison based on a remaining plurality of comparison results, and a SAR logic unit that generates a digital signal corresponding to the end of comparison and stores information for each bit of the digital signal.

Claims (24)

1 . An analog-to-digital conversion device comprising:

a signal generating unit configured to generate a plurality of comparison voltages based on an analog input voltage and to generate a plurality of comparison results with respect to the plurality of comparison voltages based on a sampling period;

a calculation unit configured to skip a comparison result generated by a comparison voltage having a smallest difference between the analog input voltages among the plurality of comparison voltages from the plurality of comparison results, and to generate an end of comparison based on a remaining plurality of comparison results; and

a SAR logic unit configured to generate a digital signal corresponding to the end of comparison and to store information for each bit of the digital signal,

wherein the signal generating unit comprises:

a comparison unit configured to invert a phase of at least one of the plurality of comparison voltages to generate a plurality of enlarged comparison voltages, and to output the plurality of comparison results based on the plurality of enlarged comparison voltages.

2 . The analog-to-digital conversion device of claim 1 , wherein the signal generating unit includes:

a sampling/hold circuit configured to sample the analog input voltage to a sampling voltage based on the sampling period; and

a converter circuit configured to convert the sampling voltage into the plurality of comparison voltages.

3 . The analog-to-digital conversion device of claim 2 , wherein the converter circuit performs a capacitor switching operation for adjusting the sampling period of the sampling voltage.

4 . The analog-to-digital conversion device of claim 1 , wherein the analog-to-digital conversion device is configured to detect a predetermined range in the sampling period.

5 . The analog-to-digital conversion device of claim 1 , wherein the end of comparison is output as a logic high level or a logic low level.

6 . A method of operating an analog-to-digital conversion device, the method comprising:

generating a plurality of comparison voltages based on an analog input voltage, and generating a plurality of comparison results with respect to the plurality of comparison voltages based on a sampling period;

skipping a comparison result generated by a comparison voltage having a smallest difference between the analog input voltages among the plurality of comparison voltages from the plurality of comparison results, and generating an end of comparison based on a remaining plurality of comparison results; and

generating a digital signal corresponding to the end of comparison and storing information for each bit of the digital signal,

wherein the generating of the plurality of comparison results comprises inverting a phase of at least one of the plurality of comparison voltages to generate a plurality of enlarged comparison voltages, and outputting the plurality of comparison results based on the plurality of enlarged comparison voltages.

7 . The method of claim 6 , wherein the generating of the plurality of comparison results includes:

sampling the analog input voltage to a sampling voltage based on the sampling period; and

converting the sampling voltage into the plurality of comparison voltages.

8 . The method of claim 7 , wherein the converting of the sampling voltage into the plurality of comparison voltages includes:

performing a capacitor switching operation for adjusting the sampling period of the sampling voltage.

9 . The method of claim 6 , wherein the method of operating the analog-to-digital conversion device includes detecting a predetermined range in the sampling period.

10 . The method of claim 6 , wherein the end of comparison is output as a logic high level or a logic low level.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Sep 21, 2023
From: KIM, CHULWOO; PARK, SOOHO; CHOI, YOHAN; KIM, CHANG JOO
To: KOREA UNIVERSITY RESEARCH AND BUSINESS FOUNDATION
Reel/Frame 064981/0619 →
Priority Claims (1)
KR 10-2023-0045482 · Apr 6, 2023 · national
Continuity (1)
Related Publication 20240340020A1 · Oct 10, 2024
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Cited By (1)
US 12,700,872