IP Library Granted Patent US 12,593,642
Granted Patent B2
US 12,593,642 · App. 18/475,509 · Granted Mar 31, 2026

Method of processing a wafer

Inventors: Hayato Iga (Tokyo, JP); Kazuya Hirata (Tokyo, JP)
Assignee: DISCO CORPORATION
H10P72/0428B23K26/53B24B7/228B24B9/065H10B80/00H10P10/12H10P10/128H10P34/42H10P52/00H10P54/00H10P72/0452H10P72/0604H10P72/0616H10P74/203H10P74/23H10W72/0198H10W90/00H10W72/073H10W90/732
View Patent ↗
Loading inventors, assignments & file history…
Monitor This Case
Get email alerts when status or documents change.
Order Certified Copies
Most orders are placed with the USPTO same day — all within 24 business hours.
Order via The Patent Place →
Pre-filled with this patent's details
Quick Facts
Patent No.
US 12,593,642
App. No.
18/475,509
Granted
Mar 31, 2026
Kind
B2
Abstract

A method of processing a wafer includes forming a bonded wafer assembly by bonding one of opposite surfaces of a first wafer to a second wafer, the first wafer having a device region and an outer circumferential excessive region, applying a laser beam to the first wafer while positioning a focused spot of the laser beam radially inwardly from the outer circumferential edge of the first wafer, on an inclined plane that is progressively closer to the one of the opposite surfaces of the first wafer toward the outer circumferential edge, thereby forming a separation layer shaped as a side surface of a truncated cone, grinding the first wafer from the other one of the opposite surfaces thereof to thin down the first wafer to a predetermined thickness, and detecting whether or not the outer circumferential excessive region has been removed from the first wafer.

Claims (10)

1 . A method of processing a wafer comprising:

a bonded wafer assembly forming step of forming a bonded wafer assembly by bonding one of opposite surfaces of a first wafer to one of opposite surfaces of a second wafer, the first wafer having a device region where a plurality of devices are formed in the one of the opposite surfaces, an outer circumferential excessive region surrounding the device region, and a beveled outer circumferential edge;

a separation layer forming step of applying a laser beam to the outer circumferential excessive region of the first wafer while positioning a focused spot of the laser beam in a region spaced a predetermined distance radially inwardly from the outer circumferential edge, on an inclined plane that is progressively closer to the one of the opposite surfaces of the first wafer toward the outer circumferential edge, thereby forming a separation layer shaped as a side surface of a truncated cone that is inclined from the one of the opposite surfaces of the first wafer to an other one of the opposite surfaces of the first wafer;

a grinding step of, after the separation layer forming step has been carried out, grinding the first wafer of the bonded wafer assembly from the other one of the opposite surfaces of the first wafer to thin down the first wafer to a predetermined thickness; and

a detecting step, performed by a controller including a processor, of, while the grinding step is being carried out or after the grinding step has been carried out, applying measurement light with a light source to the outer circumferential excess region, measuring the intensity of reflected measurement light with a light detecting unit, and using an electrical signal converted, by the light detecting unit, from the measured intensity of the reflected measurement light to determine whether the outer circumferential excessive region that extends from the separation layer to the outer circumferential edge has been removed from the first wafer.

2 . The method of processing a wafer according to claim 1 , wherein

the detecting step includes determining whether or not the outer circumferential excessive region has been removed from the first wafer, by detecting at least either light reflected by the outer circumferential excessive region or light reflected by the separation layer.

3 . The method of processing a wafer according to claim 1 , further comprising:

in a case where it is determined in the detecting step that the outer circumferential excessive region has not been removed from the first wafer,

an external force applying step of applying an external force to the outer circumferential excessive region to remove the outer circumferential excessive region from the first wafer.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Sep 27, 2023
From: IGA, HAYATO; HIRATA, KAZUYA
To: DISCO CORPORATION
Reel/Frame 065046/0066 →
Priority Claims (1)
JP 2022-161592 · Oct 6, 2022 · national
Continuity (1)
Related Publication 20240120215A1 · Apr 11, 2024
References Cited (49)
US 6420245B1 · Manor · 2002 [cited by examiner]
US 7682225B2 · Hongo · 2010 [cited by examiner]
US 8125654B2 · Benvegnu · 2012 [cited by examiner]
US 8821644B2 · Sakuragi · 2014 [cited by examiner]
US 9138913B2 · Arai · 2015 [cited by examiner]
US 9255894B2 · VanHoomissen · 2016 [cited by examiner]
US 9815138B2 · Hirata · 2017 [cited by examiner]
US 9929018B2 · Bieck · 2018 [cited by examiner]
US 10249518B2 · Adachi · 2019 [cited by examiner]
US 10576585B1 · Donofrio · 2020 [cited by examiner]
US 10870176B2 · Hirata · 2020 [cited by examiner]
US 11222822B2 · Yamamoto · 2022 [cited by examiner]
US 11819950B2 · Komatsu · 2023 [cited by examiner]
US 11881407B2 · Nagaya · 2024 [cited by examiner]
US 11958132B2 · Hirata · 2024 [cited by examiner]
US 12011781B2 · Ungaro · 2024 [cited by examiner]
US 12151401B2 · Komatsu · 2024 [cited by examiner]
US 20040065647A1 · Kubo · 2004 [cited by examiner]
US 20040169869A1 · Shin · 2004 [cited by examiner]
US 20050199592A1 · Iri · 2005 [cited by examiner]
US 20080128396A1 · Shigematsu · 2008 [cited by examiner]
US 20080200100A1 · Takahashi · 2008 [cited by examiner]
US 20210197319A1 · Hirata · 2021 [cited by examiner]
US 20230036386A1 · Taylor · 2023 [cited by examiner]
US 20230048318A1 · Hirata · 2023 [cited by examiner]
US 20230050807A1 · Iga · 2023 [cited by examiner]
US 20230054570A1 · Sakamoto · 2023 [cited by examiner]
US 20230066601A1 · Iga · 2023 [cited by examiner]
US 20240087901A1 · Sekiya · 2024 [cited by examiner]
US 20240112902A1 · Iga · 2024 [cited by examiner]
US 20240128087A1 · Iga · 2024 [cited by examiner]
US 20240145248A1 · Iga · 2024 [cited by examiner]
US 20240153776A1 · Iga · 2024 [cited by examiner]
US 20240194501A1 · Iizuka · 2024 [cited by examiner]
US 20240297052A1 · Tanaka · 2024 [cited by examiner]
US 20240304448A1 · Tanaka · 2024 [cited by examiner]
US 20240304457A1 · Tanaka · 2024 [cited by examiner]
US 20240339326A1 · Chen · 2024 [cited by examiner]
US 20240399494A1 · Hirata · 2024 [cited by examiner]
CN 103862180A · 2014 [cited by examiner]
DE 102020216544A1 · 2021 [cited by examiner]
JP 2005032804A · 2005 [cited by examiner]
JP 2008500907A · 2008 [cited by examiner]
JP 2008298696A · 2008 [cited by examiner]
JP 2013237115A · 2013 [cited by examiner]
JP 2020057709A · 2020 [cited by applicant]
JP 2020136662A · 2020 [cited by examiner]
JP 2022043891A · 2022 [cited by examiner]
JP 2024011097A · 2024 [cited by examiner]