CMOS image sensor having indented photodiode structure
The present disclosure relates to a CMOS image sensor, and an associated method of formation. In some embodiments, the CMOS image sensor comprises a substrate and a transfer gate disposed from a front-side surface of the substrate. The CMOS image sensor further comprises a photo detecting column disposed at one side of the transfer gate within the substrate. The photo detecting column comprises a doped sensing layer comprising one or more recessed portions along a circumference of the doped sensing layer in parallel to the front-side surface of the substrate. By forming the photo detecting column with recessed portions, a junction interface is enlarged compared to a previous p-n junction interface without recessed portions, and thus a full well capacity of the photodiode structure is improved.
1. A method of forming an image sensor, comprising:
forming a transfer gate over a substrate, wherein the substrate is doped with a first doping type;
forming a floating diffusion region within the substrate;
forming a masking layer over the substrate, the masking layer having a circumference including a first recessed portion spaced apart from a second recessed portion from a top-down view, the first recessed portion and the second recessed portion are symmetrically distributed across a line that extends through centers of both the transfer gate and the floating diffusion region; and
with the masking layer in place, performing a plurality of implantation processes to form a photo detecting column within the substrate at one side of the transfer gate opposing to the floating diffusion region;
wherein the photo detecting column and the substrate are in contact with each other at a junction interface and configured as a photodiode structure to convert radiation that enters the substrate into an electrical signal.
2. The method of claim 1 , further comprising:
forming a back-end-of-the-line (BEOL) metallization stack on a front-side of the substrate, wherein the BEOL metallization stack comprises a plurality of metal interconnect layers within one or more inter-level dielectric layers.
3. The method of claim 1 , wherein the photo detecting column is formed with one or more recessed portions extending upwardly to a front-side surface of the substrate.
4. The method of claim 1 , wherein the plurality of implantation processes further comprises:
forming a deep doped layer with a second doping type different than the first doping type;
forming a doped sensing layer with the second doping type over the deep doped layer; and
forming a pinning layer with the first doping type over the doped sensing layer.
5. The method of claim 4 , wherein the pinning layer is formed with a first sidewall surface and a second sidewall surface both vertically aligned with that of the doped sensing layer.
6. The method of claim 4 , wherein the deep doped layer has a doping concentration smaller than that of the doped sensing layer.
7. The method of claim 1 , wherein a top surface of the photo detecting column has a concave polygon shape.
8. A method for forming an image sensor, the method comprising:
forming a transfer gate over a substrate, wherein the substrate is doped with a first doping type;
forming a floating diffusion region within the substrate on one side of the transfer gate; and
forming a photo detecting column within the substrate on another side of the transfer gate opposite to the floating diffusion region;
wherein the photo detecting column has a circumference with recessed portions extending vertically from top to bottom that are symmetrically distributed along a line that extends through centers of both the transfer gate and the floating diffusion region, and wherein the recessed portions have a height that is equal to a height of the photo detecting column.
9. The method of claim 8 , wherein the forming of the photo detecting column further comprises:
forming a deep doped layer with a second doping type different than the first doping type;
forming a doped sensing layer with the second doping type over the deep doped layer; and
forming a pinning layer with the first doping type over the doped sensing layer.
10. The method of claim 9 , wherein the deep doped layer is formed with a thickness about two times greater than that of the doped sensing layer.
11. The method of claim 9 , wherein the deep doped layer is formed with a first sidewall surface and a second sidewall surface both vertically aligned with that of the doped sensing layer.
12. The method of claim 8 , further comprising:
forming a back-end-of-line (BEOL) metallization stack on a front-side of the substrate and comprising a plurality of metal interconnect layers within one or more inter-level dielectric layers.
13. The method of claim 8 , further comprising:
forming a color filter on a back-side of the substrate opposite to a front-side of the substrate and in a grid structure, wherein the color filter overlies the photo detecting column.
14. A method for forming a complementary metal-oxide-semiconductor (CMOS) image sensor, the method comprising:
forming a transfer gate over a substrate;
forming a floating diffusion region within the substrate; and
forming a photo detecting column within the substrate on another side of the transfer gate opposite to the floating diffusion region;
wherein the photo detecting column has a first recessed portion and a second recessed portion, the first recessed portion extends from a first side into the photo detecting column along a first direction, and the second recessed portion extends from a second side into the photo detecting column along a second direction, the first direction being perpendicular to the second direction.
15. The method of claim 14 , wherein the transfer gate has a triangular shape.
16. The method of claim 14 , wherein a top surface of the photo detecting column has a concave polygon shape.
17. The method of claim 14 , wherein the first recessed portion and the second recessed portion are symmetrically mirrored across a plane that extends through both the transfer gate and the floating diffusion region.
18. The method of claim 14 , further comprising:
forming a back-end-of-the-line (BEOL) metallization stack on a front-side of the substrate, wherein the BEOL metallization stack comprises a plurality of metal interconnect layers within one or more inter-level dielectric layers.
19. The method of claim 14 , wherein the forming of the photo detecting column further comprises:
forming a deep doped layer with a second doping type different than a first doping type;
forming a doped sensing layer with the second doping type over the deep doped layer; and
forming a pinning layer with the first doping type over the doped sensing layer.
20. The method of claim 19 , wherein the deep doped layer has a thickness about two times greater than that of the doped sensing layer.