IP Library Granted Patent US 12,652,408
Granted Patent B2
US 12,652,408 · App. 18/816,528 · Granted Jun 9, 2026

Support of mixed IRAP and non-IRAP pictures within an access unit in multi-layer video bitstreams

Inventor: Ye-Kui Wang (San Diego, CA)
Assignee: Huawei Technologies Co., Ltd.
H04N19/46H04N19/107H04N19/11H04N19/136H04N19/14H04N19/172H04N19/184H04N19/187H04N19/43H04N19/593
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Quick Facts
Patent No.
US 12,652,408
App. No.
18/816,528
Granted
Jun 9, 2026
Kind
B2
Abstract

A method of decoding implemented by a video decoder is provided. The method includes receiving a bitstream including a coded video sequence start (CVSS) access unit (AU), wherein the CVSS AU contains a picture unit (PU) for each layer, and wherein a coded picture in each PU is a coded layer video sequence start (CLVSS) picture; identifying the coded picture from one of the layers based on a picture order count (POC) value; and decoding the coded picture to obtain a decoded picture.

Claims (36)

1 . An encoding apparatus, comprising:

a memory storing instructions;

one or more processors coupled to the memory, the one or more processors configured to execute the instructions stored in the memory to cause the encoding apparatus to:

insert a picture unit (PU) containing a coded picture in each layer of a coded video sequence start (CVSS) access unit (AU), wherein the coded picture in each layer is a coded layer video sequence start (CLVSS) picture, wherein the CLVSS picture is associated with a no output before recovery flag, and wherein the no output before recovery flag is equal to 1; and

encode a coded layer video sequence (CLVS) including the CVSS AU into a bitstream.

2 . The encoding apparatus of claim 1 , wherein the one or more processors configured to store the bitstream for communication toward a video decoder.

3 . The encoding apparatus of claim 1 , wherein the CLVSS picture is an intra random access point (IRAP) picture.

4 . The encoding apparatus of claim 1 , wherein the CLVSS picture is a gradual decoding refresh (GDR) picture.

5 . The encoding apparatus of claim 1 , wherein each layer of the CVSS AU is specified by a video parameter set (VPS), and wherein the CVSS AU is an initial AU of a coded video sequence (CVS).

6 . The encoding apparatus of claim 1 , wherein the one or more processors configured to:

insert a picture unit (PU) containing a coded picture in each layer of a second coded video sequence start (CVSS) access unit (AU) into a second video bitstream, wherein the coded picture in each PU is not a CLVSS picture; and

ensure that a conforming bitstream corresponding to the second video bitstream is encoded.

7 . The encoding apparatus of claim 1 , wherein the encoding apparatus is constrained such that the coded picture in each layer is the CLVSS picture.

8 . A non-transitory computer-readable medium storing a bitstream that, when decoded by a decoding device, is used by the decoding device to generate a video, the bitstream comprising:

a picture unit (PU) containing a coded picture in each layer of a coded video sequence start (CVSS) access unit (AU), wherein the coded picture in each layer is a coded layer video sequence start (CLVSS) picture; and

a coded layer video sequence (CLVS) including the CVSS AU,

wherein the generating the video comprises:

associating the CLVSS picture with a no output before recovery flag, and the no output before recovery flag is equal to 1; and

decoding the coded picture to obtain a decoded picture.

9 . The non-transitory computer-readable medium of claim 8 , wherein the CLVSS picture is an intra random access point (IRAP) picture.

10 . The non-transitory computer-readable medium of claim 8 , wherein the CLVSS picture is a gradual decoding refresh (GDR) picture.

11 . The non-transitory computer-readable medium of claim 8 , wherein each layer of the CVSS AU is specified by a video parameter set (VPS).

12 . The non-transitory computer-readable medium of claim 8 , wherein the CVSS AU is an initial AU of a coded video sequence (CVS).

13 . A non-transitory computer-readable medium storing instructions that, when executed by one or more processors, cause a video processing apparatus to:

receive a bitstream including a coded video sequence start (CVSS) access unit (AU), wherein the CVSS AU contains a picture unit (PU) for each layer, and wherein a coded picture in each PU is a coded layer video sequence start (CLVSS) picture;

identify the coded picture from one of the layers based on a picture order count (POC) value; and

decode the coded picture to obtain a decoded picture.

14 . The non-transitory computer-readable medium of claim 13 , wherein the CLVSS picture is an intra random access point (IRAP) picture.

15 . The non-transitory computer-readable medium of claim 13 , wherein the CLVSS picture is a gradual decoding refresh (GDR) picture.

16 . The non-transitory computer-readable medium of claim 13 , wherein the CLVSS picture is associated with a no output before recovery flag, and wherein the no output before recovery flag is equal to 1.

17 . The non-transitory computer-readable medium of claim 13 , wherein each layer of the CVSS AU is specified by a video parameter set (VPS).

18 . The non-transitory computer-readable medium of claim 13 , wherein the CVSS AU is an initial AU of a coded video sequence (CVS).

19 . The non-transitory computer-readable medium of claim 13 , wherein the one or more processors further cause the video processing apparatus to display the coded picture as decoded on a display of an electronic device.

20 . The non-transitory computer-readable medium of claim 13 , wherein the one or more processors further cause the video processing apparatus to:

receive a second video bitstream including a second CVSS AU, wherein the second CVSS AU contains a picture unit (PU) for each layer, and wherein a coded picture in each PU is not a CLVSS picture; and

in response to the second video bitstream being received, take some other corrective measures to ensure that a conforming bitstream corresponding to the second video bitstream is received prior to decoding the coded picture.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Mar 26, 2026
From: FUTUREWEI TECHNOLOGIES, INC.
To: HUAWEI TECHNOLOGIES CO., LTD.
Reel/Frame 075280/0479 →
Continuity (4)
Continuation 17700845 · Mar 22, 2022
Continuation PCTUS2020050988 · Sep 16, 2020
Provisional Application 62905141 · Sep 24, 2019
Related Publication 20250063188A1 · Feb 20, 2025
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