IP Library Granted Patent US 12,494,403
Granted Patent B2
US 12,494,403 · App. 19/098,960 · Granted Dec 9, 2025

Preserving access to optical components on a wafer package with sacrificial die

Inventors: Ankur Aggarwal (Pleasanton, CA); Subal Sahni (La Jolla, CA); Anmol Rathi (San Jose, CA); Suresh Venkata Pothukuchi (Chandler, AZ)
Assignee: Celestial AI Inc.
H01L23/315G02B6/4228H01L25/167
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Quick Facts
Patent No.
US 12,494,403
App. No.
19/098,960
Granted
Dec 9, 2025
Kind
B2
Abstract

The present disclosure relates to packaging techniques in connection with packaging electrical and optical components within circuit packages. For example, one or more examples described herein involve techniques for packaging an electro-photonic circuit while preserving access to a grating coupler, which may involve using a sacrificial die in conjunction with a unique overmolding process.

Claims (37)

1 . A method for packaging an electro-photonic circuit, comprising:

obtaining a substrate having an optical region configured to allow light to exit or enter from a top surface of the substrate;

positioning a sacrificial die on the top surface of the substrate covering the optical region, wherein the sacrificial die has been pre-cut with a plurality of vertical cuts extending from a bottom surface of the sacrificial die towards a top surface of the sacrificial die, the plurality of vertical cuts defining a portion of the sacrificial die positioned over the optical region;

depositing an overmold over the substrate and over the sacrificial die;

grinding down a top surface of the overmold, wherein grinding down the top surface of the overmold includes grinding down from the top surface of the sacrificial die to a vertical position within a body of the sacrificial die where the plurality of vertical cuts extend, thereby causing the portion of the sacrificial die positioned over the optical region to disconnect from the body of the sacrificial die; and

removing the portion of the sacrificial die that disconnected from the body of the sacrificial die.

2 . The method of claim 1 , wherein removing the portion of the sacrificial die exposes an optical path to the optical region near the top surface of the substrate.

3 . The method of claim 1 , further comprising coupling a plurality of optical fibers to the optical region using an optical interface component.

4 . The method of claim 3 , wherein the optical interface component is a fiber array unit (FAU).

5 . The method of claim 1 , wherein:

the substrate comprises bumps on the top surface of the substrate and waveguides formed within the substrate; and

the method further comprises, prior to depositing the overmold over the top surface of the substrate, disposing one or more electronic components on the top surface of the substrate, wherein disposing the one or more of electronic components over the top surface of the substrate comprises electrically connecting the one or more electronic components to the bumps on the top surface of the substrate to form electro-optical paths from the one or more electronic components to the optical region through the waveguides formed within the substrate.

6 . The method of claim 5 , wherein the one or more electronic components include one or more of a processor component, a memory component, or an analog mixed signal (AMS) block.

7 . The method of claim 1 , further comprising pre-cutting the sacrificial die by cutting the plurality of vertical cuts through a portion of the body of the sacrificial die without cutting through an entire body of the sacrificial die.

8 . The method of claim 1 , wherein an uncut portion of the body of the sacrificial die is between 25 and 75 microns thick.

9 . The method of claim 8 , wherein the body of the sacrificial die prior to grinding down from the top surface of the sacrificial die is less than 1000 microns thick.

10 . The method of claim 1 , wherein the sacrificial die includes a protective layer that, when positioned over the top surface of the substrate at the position corresponding to the optical region, provides a protective barrier between a bottom surface of the sacrificial die and the optical region.

11 . The method of claim 1 , wherein the sacrificial die includes an adhesive layer around a perimeter of the bottom surface of the sacrificial die positioned over the optical region, wherein the adhesive layer secures the sacrificial die in place over the top surface of the substrate at the position corresponding to the optical region.

12 . The method of claim 1 , wherein positioning the sacrificial die over the top surface of the substrate covering the optical region prevents the overmold from flowing between the sacrificial die and the substrate.

13 . The method of claim 1 , wherein the sacrificial die is an electrically non-functional component.

14 . A method for packaging an electro-photonic circuit, comprising:

obtaining a photonic integrated circuit (PIC) wafer comprising:

an optical region near a top surface of the PIC wafer configured to allow light to enter and exit the PIC wafer;

optical transmitter and receiver portions in optical communication with the optical region, the optical transmitter and receiver portions having electrical interconnects to the top surface of the PIC wafer in a portion that does not extend into the optical region; and

one or more electronic components on the PIC wafer, the one or more electronic components including electrical transmitter and receiver portions interconnected with the optical transmitter and receiver portions and forming electro-optical paths to and from the one or more electronic components to the optical region;

positioning a sacrificial die over the top surface of the PIC wafer covering the optical region, wherein the sacrificial die has been pre-cut with a plurality of vertical cuts extending from a bottom surface of the sacrificial die towards a top surface of the sacrificial die, the plurality of vertical cuts defining a portion of the sacrificial die positioned over the optical region;

depositing an overmold over the PIC wafer, the one or more electronic components, and over the sacrificial die;

grinding down a top surface of the overmold, wherein grinding down the top surface of the overmold includes grinding down from the top surface of the sacrificial die to a vertical position within a body of the sacrificial die where the plurality of vertical cuts extend, thereby causing the portion of the sacrificial die positioned over the optical region to disconnect from the body of the sacrificial die; and

removing the portion of the sacrificial die that disconnected from the body of the sacrificial die.

15 . The method of claim 14 , wherein removing the portion of the sacrificial die exposes an optical path to the optical region near the top surface of the PIC wafer.

16 . The method of claim 15 , wherein the sacrificial die is an electrically non-functional component.

17 . The method of claim 14 , further comprising coupling an optical fiber to a grating coupler in the optical region using an optical interface component, the optical interface component comprising a fiber array unit (FAU).

18 . The method of claim 14 , further comprising pre-cutting the sacrificial die by cutting the plurality of vertical cuts through a portion of the body of the sacrificial die without cutting through an entire body of the sacrificial die.

19 . The method of claim 14 , wherein an uncut portion of the body of the sacrificial die is between 25 and 75 microns thick.

20 . The method of claim 19 , wherein the body of the sacrificial die prior to grinding down from the top surface of the sacrificial die is less than 1000 microns thick.

21 . The method of claim 14 , wherein the sacrificial die includes a protective layer that, when positioned over the top surface of the wafer at the position corresponding to the optical region, provides a protective barrier between the bottom surface of the sacrificial die and the optical region.

22 . The method of claim 14 , wherein the sacrificial die includes an adhesive layer around a perimeter of the bottom surface of the sacrificial die positioned over the optical region, wherein the adhesive layer secures the sacrificial die in place over the top surface of the PIC wafer at the position corresponding to the optical region.

Assignments (3)
MERGER Recorded Feb 10, 2026
From: CELESTIAL AI INC.
To: SICILY MERGER SUB II, INC.
Reel/Frame 074721/0610 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Sep 22, 2025
From: AGGARWAL, ANKUR; SAHNI, SUBAL; OH, KYUNG; POTHUKUCHI, SURESH VENKATA
To: CELESTIAL AI INC.
Reel/Frame 072333/0573 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Sep 22, 2025
From: AGGARWAL, ANKUR; POTHUKUCHI, SURESH VENKATA; RATHI, ANMOL
To: CELESTIAL AI INC.
Reel/Frame 072333/0665 →
Continuity (3)
Provisional Application 63694684 · Sep 13, 2024
Provisional Application 63655461 · Jun 3, 2024
Related Publication 20250372470A1 · Dec 4, 2025
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