Display device having an embedded shielding layer flexible substrate
A display device includes a flexible substrate, a buffer layer on the flexible substrate and including an inorganic material, a display area including a plurality of pixels on the buffer layer and each including a pixel circuit including a first thin film transistor (TFT), a second TFT, and a storage capacitor and a display device connected to the pixel circuit, and a non-display area that is adjacent to the display area. The flexible substrate includes at least one base layer, at least one inorganic barrier layer, and a shielding layer including a portion having a certain area and an opening adjacent to the portion.
1 . A display device comprising:
a flexible substrate;
a buffer layer arranged on the flexible substrate and comprising an inorganic insulating material; and
a plurality of pixel circuits arranged on the buffer layer, and a plurality of display elements respectively electrically connected to the plurality of pixel circuits,
wherein the flexible substrate comprises at least one polymer layer, at least one inorganic barrier layer, and a shielding layer having conductivity, and
the shielding layer comprises a plurality of first areas corresponding to the plurality of pixel circuits in a plan view, respectively, and spaced apart from each other in a first direction and a second direction perpendicular to the first direction, and a plurality of second areas connecting the plurality of first areas in at least one of the first direction and the second direction.
2 . The display device of claim 1 , wherein
each of the plurality of pixel circuits comprises a driving thin-film transistor, a switching thin-film transistor, and a storage capacitor, and
the plurality of first areas overlap the driving thin-film transistors of the plurality of pixel circuits, respectively.
3 . The display device of claim 2 , wherein the plurality of first areas overlap the storage capacitors of the plurality of pixel circuits, respectively.
4 . The display device of claim 1 , wherein the shielding layer comprises an opening surrounded by the plurality of first areas and the plurality of second areas.
5 . The display device of claim 4 , wherein the flexible substrate comprises:
a first polymer layer;
a second polymer layer on the first polymer layer;
an inorganic barrier layer between the first polymer layer and the second polymer layer; and
the shielding layer.
6 . The display device of claim 5 , wherein
the first polymer layer comprises an upper surface that faces the inorganic barrier layer, and a lower surface opposite to the upper surface, and
the shielding layer is on at least one of the upper surface and the lower surface of the first polymer layer.
7 . The display device of claim 6 , wherein
the shielding layer is between the first polymer layer and the inorganic barrier layer, and
the inorganic barrier layer and the first polymer layer directly contact each other via the opening of the shielding layer.
8 . The display device of claim 5 , wherein
the second polymer layer comprises a lower surface that faces the inorganic barrier layer, and an upper surface opposite to the lower surface, and
the shielding layer is on at least one of the upper surface and the lower surface of the second polymer layer.
9 . The display device of claim 8 , wherein
the shielding layer is between the first polymer layer and the inorganic barrier layer, and
the inorganic barrier layer and the second polymer layer directly contact each other via the opening of the shielding layer.
10 . The display device of claim 1 , wherein the shielding layer comprises amorphous silicon doped with P-type or N-type impurities or hydrogenated amorphous silicon.
11 . The display device of claim 1 , wherein the shielding layer comprises a transparent conductive material.
12 . The display device of claim 1 , wherein the shielding layer further comprises an additional shielding portion that is on an edge of the flexible substrate and is connected to the plurality of second areas.
13. A display device comprising:
a plurality of pixel circuits, a first pixel circuit from among the plurality of pixel circuits including a driving transistor and a plurality of transistors electrically connected to the driving transistor, the driving transistor comprising a driving semiconductor layer, and each of the plurality of transistors comprising a semiconductor layer;
a plurality of light emitting diodes above the plurality of pixel circuits, a first light emitting diode from among the plurality of light emitting diodes being electrically connected to the first pixel circuit; and
a conductive layer below the plurality of pixel circuits and comprising a plurality of first portions and a plurality of second portions, each of the plurality of first portions having a first width, and each of the plurality of second portions connecting two adjacent first portions of the plurality of first portions and having a second width less than the first width,
wherein one of the plurality of first portions of the conductive layer overlaps a channel region of the driving semiconductor layer and does not overlap a channel region of the semiconductor layer of the each of the plurality of transistors.
14. The display device of claim 13 , wherein the second width of each of the plurality of second portions is measured along a direction intersecting an extending direction of each of the plurality of second portions.
15. The display device of claim 13 , wherein, in a plan view, the plurality of first portions of the conductive layer is arranged in a first direction and a second direction intersecting the first direction, and
the plurality of second portions of the conductive layer comprises:
a plurality of first sub-portions extending in the first direction and connecting two adjacent first portions of the plurality of first portions arranged in the first direction; and
a plurality of second sub-portions extending in the second direction and connecting two adjacent first portions of the plurality of first portions arranged in the second direction.
16. The display device of claim 15 , wherein the conductive layer comprises a plurality of openings, and
wherein two adjacent openings from among the plurality of openings are spaced apart from each other by one of the plurality of first and second sub-portions in the plan view.
17. The display device of claim 16 , wherein:
the driving semiconductor layer of the driving transistor comprises a source region at a first side of the channel region and a drain region at a second side of the channel region, and
the plurality of transistors of the first pixel circuit comprises:
a first transistor electrically connected to one of the source and drain regions of the driving semiconductor layer of the driving transistor; and
a second transistor electrically connected to a gate electrode of the driving transistor and another of the source and drain regions of the driving semiconductor layer of the driving transistor, the second transistor overlapping one of the plurality of openings.
18. The display device of claim 13 , further comprising a buffer layer between the driving semiconductor layer and the conductive layer, the buffer layer comprising an inorganic insulating material.
19. The display device of claim 13 , further comprising:
a first polymer layer below the conductive layer;
a second polymer layer between the first polymer layer and the conductive layer; and
an inorganic barrier layer between the first polymer layer and the second polymer layer.
20. The display device of claim 13 , wherein the driving semiconductor layer comprises polysilicon.
21. An electronic device comprising:
a first pixel circuit including a driving transistor and a plurality of transistors electrically connected to the driving transistor, the driving transistor comprising a driving semiconductor layer, and each of the plurality of transistors comprising a semiconductor layer;
a first light emitting diode above the first pixel circuit and electrically connected to the first pixel circuit; and
a conductive layer below the first pixel circuit, the conductive layer comprising:
a plurality of first portions arranged in a first direction and a second direction in a plan view; and
a plurality of second portions, each of the plurality of second portions extending from one of two adjacent first portions of the plurality of first portions to the other of the two adjacent first portions,
wherein each of the plurality of second portions has a first width in a width direction intersecting an extending direction of the each of the plurality of second portions, and the width of each of the plurality of second portions is less than a width of each of the plurality of first portions in the width direction, and
wherein one of the plurality of first portions of the conductive layer overlaps a channel region of the driving semiconductor layer and does not overlap a channel region of the semiconductor layer of each of the plurality of transistors.
22. The electronic device of claim 21 , wherein, in the plan view, the plurality of second portions of the conductive layer comprises:
a plurality of first sub-portions extending in the first direction and connecting two adjacent first portions of the plurality of first portions arranged in the first direction; and
a plurality of second sub-portions extending in the second direction and connecting two adjacent first portions of the plurality of first portions arranged in the second direction.
23. The electronic device of claim 22 , wherein the conductive layer comprises a plurality of openings, and
wherein two adjacent openings from among the plurality of openings are spaced apart from each other by one of the plurality of first and second sub-portions in the plan view.
24. The electronic device of claim 23 , wherein:
the driving semiconductor layer of the driving transistor comprises a source region at a first side of the channel region and a drain region at a second side of the channel region,
the plurality of transistors of the first pixel circuit comprises:
a first transistor electrically connected to one of the source and drain regions of the driving semiconductor layer of the driving transistor; and
a second transistor electrically connected to a gate electrode of the driving transistor and another of the source and drain regions of the driving semiconductor layer of the driving transistor, the second transistor overlapping one of the plurality of openings.
25. The electronic device of claim 21 , further comprising a buffer layer between the driving semiconductor layer and the conductive layer, the buffer layer comprising an inorganic insulating material.
26. The electronic device of claim 21 , further comprising:
a first polymer layer below the conductive layer;
a second polymer layer between the first polymer layer and the conductive layer; and
an inorganic barrier layer between the first polymer layer and the second polymer layer.
27. The electronic device of claim 21 , wherein the driving semiconductor layer comprises polysilicon.