Method of forming a metal gate structure with tuning of work function by silicon incorporation
A method for forming a semiconductor structure having a metal gate with a controlled work function includes the step of forming a precursor having a substrate with active regions separated by a channel, a temporary gate over the channel and within a dielectric layer. The temporary gate is removed to form a recess with a bottom and sidewalls in the dielectric layer. A non-silicon containing metal layer is deposited in the recess. Silicon is incorporated into the metal layer and a metal is deposited on the metal layer. The incorporation of the silicon is achieved by silane treatments that are performed before, after or both before and after the depositing of the metal layer. The amount of silicon incorporated into the metal layer controls the work function of the metal gate that is formed.
1. A method of forming a semiconductor structure comprising the steps of forming a precursor having a substrate with active regions separated by a channel, and a temporary gate over the channel and within a dielectric layer:
removing the temporary gate to form a recess with a bottom and sidewalk in the dielectric layer;
pre-soaking the recess with silane (SiH 4 );
depositing a non-silicon metal containing metal layer in the recess after the recess has been pre-soak with silane;
depositing a metal on the metal layer; and
incorporating silicon into the metal layer; the incorporating including at least incorporating silicon provided by the pre-soaking of the recess.
2. The method of claim 1 , wherein the step of incorporating silicon further includes a pre-soak with SiH 4 after the depositing of the non-silicon containing metal layer.
3. The method of claim 2 , wherein the step of incorporating silane further includes a plasma treatment alter the depositing of the non-silicon containing metal layer.
4. The method of claim 1 , wherein the step of incorporating silicon includes a plasma treatment after the deposition of the non-silicon containing metal layer.
5. The method of claim 1 , further comprising controlling an amount of silicon incorporation by controlling a number of silane treatments.
6. The method of claim 5 , wherein multiple silane treatments are performed on the metal layer.
7. The method of claim 1 , further comprising controlling silane treatment time to control an amount of silicon incorporation.
8. The method of claim 1 , further comprising controlling silane treatment temperature to control an amount of silicon incorporation.
9. The method of claim 8 , wherein the silane treatment temperature is controlled to be between about 250° C. to about 550° C.
10. The method of claim 1 , further comprising controlling the thickness of the non-silicon containing metal layer to control an amount of silicon incorporation.
11. The method of claim 1 , wherein the non-silicon containing metal layer includes one of Ta, W, Mo, Ru, Ti, TiN, TaN and Co.
12. The method of claim 2 , wherein the non-silicon containing metal layer includes one of Ta, W, Mo, Ru, Ti, TiN, TaN and Co.
13. The method of claim 12 , wherein the metal deposited on the metal layer is CU or a CU alloy.
14. The method of claim 1 , further comprising controlling silane treatment time to control an amount of silicon incorporation.