IP Library Granted Patent US 7,091,733
Granted Patent B2
US 7,091,733 · App. 10/813,257 · Granted Aug 15, 2006

Reliability evaluation test apparatus, reliability evaluation test system, contactor, and reliability evaluation test method

Assignees: Tokyo Electron Limited; Kabushiki Kaisha Toshiba; Ibiden Co., Ltd.
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Quick Facts
Patent No.
US 7,091,733
App. No.
10/813,257
Granted
Aug 15, 2006
Kind
B2
Abstract

A reliability evaluation test apparatus of this invention includes a wafer storage section which stores a wafer in a state wherein the electrode pads of a number of devices formed on the wafer and the bumps of a contactor are totally in electrical contact with each other. The wafer storage section transmits/receives a test signal to/from a measurement section and has a hermetic and heat insulating structure. The wafer storage section has a pressure mechanism which presses the contactor and a heating mechanism which directly heats the wafer totally in contact with the contactor to a predetermined high temperature. The reliability of an interconnection film and insulating film formed on the semiconductor wafer are evaluated under an accelerated condition.

Claims (23)

1. A reliability evaluation test apparatus which tests a reliability of a semiconductor wafer on the basis of a test signal from a measurement unit, comprising a measurement section and a storage section which has a hermetic and heat insulating structure, stores a semiconductor wafer that is totally in electrical contact with a contactor, and transmits/receives a test signal to/from the measurement section, comprising:

a pressure mechanism which presses the contactor in the storage section; and

a heating mechanism which heats the semiconductor wafer that is totally brought into contact with the contactor by the pressure mechanism to a predetermined temperature,

wherein the reliability evaluation test apparatus evaluates reliability of a multilayered interconnection and an insulting film, which are formed on the semiconductor wafer, under an accelerated condition.

2. A reliability evaluation test apparatus according to claim 1 , wherein the storage section has a table which has a heat insulating structure and on which the semiconductor wafer is placed, a connection ring which surrounds the table and comes into electrical contact with the contactor, and a wiring board which comes into electrical contact with the connection ring and transmits/receives the test signal to/from the measurement section.

3. A reliability evaluation test apparatus according to claim 2 , further comprising, on the connection ring, a seal member which comes into contact with the contactor to seal a space in the storage section from an outside, and means for supplying an inert gas and/or reducing gas into the storage section.

4. A reliability evaluation test apparatus according to claim 1 , wherein the pressure mechanism comprises a pressure plate which presses the contactor, a bellows whose lower end is connected to the pressure plate, a support which is connected to an upper end of the bellows and can move vertically, and means for supplying a gas into a space formed by the pressure plate, the bellows, and the support.

5. A reliability evaluation test apparatus according to claim 1 , wherein the heating mechanism comprises a heater which uniformly heats an entire surface of the semiconductor wafer from a lower surface side and also serves as the table.

6. A reliability evaluation test apparatus according to claim 5 , wherein the heater comprises a first heater which heats a central portion of the semiconductor wafer, and a second heater which surrounds the first heater and heats an outer edge portion of the semiconductor wafer.

7. A reliability evaluation test apparatus according to claim 5 , wherein the heating mechanism comprises an auxiliary heater which heats the entire surface of the semiconductor wafer from an upper surface side.

8. A reliability evaluation test apparatus according to claim 1 , wherein the measurement section comprises an electromigration measurement section and a leakage current measurement section.

9. A reliability evaluation test apparatus according to claim 8 , further comprises a switching mechanism which alternately switches between the measurement sections.

10. A reliability evaluation test apparatus according to claim 8 , wherein the electromigration measurement section comprises a function of supplying three kinds of currents including a DC current, a pulse DC current, and an AC current.

11. A reliability evaluation test apparatus according to claim 1 , in which a plurality of test patterns are formed on the semiconductor wafer, and which comprises a test pattern grouping function of putting the plurality of test patterns into groups and executing a reliability evaluation test for not less than five groups simultaneously.

12. A reliability evaluation test apparatus according to claim 1 , further comprising an anisotropic conductive film between the contactor and the semiconductor wafer.

13. A reliability evaluation test apparatus according to claim 1 , wherein the measurement section simultaneously executes a reliability evaluation test of not less than 100 semiconductor devices formed on the semiconductor wafer.

14. A reliability evaluation test apparatus according to claim 1 , wherein the storage section comprises a heat insulating structure which maintains the semiconductor wafer at a temperature of not less than 160° C.

15. A reliability evaluation test apparatus according to claim 1 , wherein the contactor includes a heat-resistant substrate, and a thermal expansion coefficient of the heat-resistant substrate is 1 to 50 ppm/° C.

16. A reliability evaluation test system comprising: an aligner which totally brings a contactor into contact with a semiconductor wafer; a transfer tool which transfers the contactor and the semiconductor wafer, which are totally kept in contact with each other by the aligner; and a reliability evaluation test apparatus of claim 1 , which executes a reliability evaluation test of the semiconductor wafer transferred by the transfer tool.

17. A reliability evaluation test system according to claim 16 , which allows data communication between the aligner and the reliability evaluation test apparatus.

18. A reliability evaluation test system according to claim 16 , wherein the aligner includes a microscope to observe the semiconductor wafer on the basis of a test result of the semiconductor wafer.

19. A reliability evaluation test system according to claim 16 , wherein the transfer tool includes a magnet to integrate the contactor and the semiconductor wafer.

20. A reliability evaluation test system according to claim 16 , wherein the transfer tool includes a magnetic circuit and switch means for turning on/off the magnetic circuit, and the switch means excites/degausses the magnetic circuit to cause the transfer tool to attract/release the contactor and the semiconductor wafer.

Assignments (2)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jan 26, 2010
From: KABUSHIKI KAISHA TOSHIBA
To: TOKYO ELECTRON LIMITED; IBIDEN CO., LTD.
Reel/Frame 023839/0755 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Mar 31, 2004
From: TAKEKOSHI, KIYOSHI; HOSAKA, HISATOMI; HAGIHARA, JUNICHI; HATSUSHIKA, KUNIHIKO; USUI, TAKAMASA; KANEKO, HISASHI; HAYASAKA, NOBUO; IDO, YOSHIYUKI
To: TOKYO ELECTRON LIMITED; KABUSHIKI KAISHA TOSHIBA; IBIDEN CO., LTD.
Reel/Frame 015171/0808 →
Priority Claims (1)
JP 2001-367268 · Nov 30, 2001 · national
Continuity (2)
Continuation PCTJP021234800 · Nov 27, 2002
Related Publication 20040183561A1 · Sep 23, 2004