Thin film resistor device and a method of manufacture therefor
The present invention provides a thin film resistor and method of manufacture therefor. The thin film resistor comprises a resistive layer located on a first dielectric layer, first and second contact pads located on the resistive layer, and a second dielectric layer located over the resistive layer and the first and second contact pads. In an illustrative embodiment, the thin film resistor further includes a first interconnect that contacts the first contact pad and a second interconnect that contacts the second contact pad.
1. An integrated circuit, comprising:
transistors;
interconnects formed in dielectric layers located over the transistors that interconnect the transistors to form an operative integrated circuit; and
a thin film resistor device interconnected to the transistors, including:
a resistive layer located on a first dielectric layer;
first and second contact pads located atop the resistive layer; and
a second dielectric layer located directly on the resistive layer directly on a top surface of and the first and second contact pads.
2. The integrated circuit as recited in claim 1 further including a first interconnect that contacts the first contact pad and a second interconnect that contacts the second contact pad.
3. The integrated circuit as recited in claim 2 further including interconnect metallization structures wherein the first dielectric layer is located between the interconnect metallization structure and the resistive layer.
4. The integrated circuit as recited in claim 3 wherein each of the first and second interconnects contact an interconnect metallization structure.
5. The integrated circuit as recited in claim 2 wherein the first and second contact pads each have a width that is about 3000 nm greater than a width of at least one of the first and second interconnects.
6. The integrated circuit as recited in claim 2 wherein the first and second interconnects comprise aluminum.
7. The integrated circuit as recited in claim 6 wherein the first and second interconnects comprise a titanium/titanium nitride/aluminum/titanium nitride stack.
8. The integrated circuit as recited in claim 1 wherein the resistive layer includes tantalum nitride.
9. The integrated circuit as recited in claim 8 wherein the resistive layer further includes tantalum pentoxide.
10. The integrated circuit as recited in claim 1 wherein the first and second contact pads comprise a titanium/platinum stack.
11. The integrated circuit as recited in claim 10 wherein the titanium/platinum stack includes titanium nitride located there between.
12. The integrated circuit as recited in claim 1 wherein the resistive layer has a thickness ranging from about 20 nm to about 80 nm.
13. The integrated circuit as recited in claim 1 wherein the transistors form part of a complementary metal oxide semiconductor (CMOS) device, bipolar device or BiCMOS device.