MIM capacitor and method of making same
View Patent ↗A MIM capacitor device and method of making the device. The device includes an upper plate comprising one or more electrically conductive layers, the upper plate having a top surface, a bottom surface and sidewalls; a spreader plate comprising one or more electrically conductive layers, the spreader plate having a top surface, a bottom surface and sidewalls; and a dielectric block comprising one or more dielectric layers the dielectric block having a top surface, a bottom surface and sidewalls, the top surface of the dielectric block in physical contact with the bottom surface of the upper plate, the bottom surface of the dielectric block over the top surface of the spreader plate, the sidewalls of the upper plate and the dielectric block essentially co-planer.
1. A method, comprising:
forming one or more copper lower interconnects in a first interlevel dielectric layer;
forming a first intermediate dielectric layer on a top of said first interlevel dielectric layer;
forming a trench in said first intermediate dielectric layer, top surfaces of said one or more said lower interconnects exposed in a bottom of said trench;
forming an electrically conductive spreader plate in and completely filling said trench, a bottom surface of said spreader plate in physical and electrical contact with said one or more copper lower interconnects;
forming a MIM dielectric block over a top surface of said spreader plate;
forming an electrically conductive upper plate on a top surface of said MIM dielectric block, sidewalls of said upper plate and said MIM dielectric plate essentially co-planer;
forming a second intermediate dielectric layer on top of said first intermediate dielectric layer, a top surface of said second intermediate dielectric layer coplanar with a top surface of said upper plate;
forming a second interlevel dielectric layer on said top surfaces of said second intermediate dielectric layer and said upper plate; and
forming one or more copper upper interconnects in said second interlevel dielectric layer, said one or more upper interconnects in physical and electrical contact with said top surface of said upper plate.
2. The method of claim 1 , further including, forming an electrically conductive lower plate between said spreading plate and said dielectric block, sidewalls of said lower plate co-planer with said sidewalls of said dielectric block and said upper plate.
3. The method of claim 2 , wherein said lower plate comprise a layer of tantalum, a layer of tantalum nitride, a layer of titanium, a layer of titanium nitride, a layer of tungsten or combinations of layers thereof.
4. The method of claim 1 , wherein perimeters of said upper plate and said dielectric block do not extend a perimeter of said spreader plate.
5. The method of claim 1 ,
wherein said upper plate comprises a layer of tantalum, a layer of tantalum nitride, a layer of titanium, a layer of titanium nitride, a layer of tungsten or combinations of layers thereof, and
wherein said dielectric block comprises a layer of a metal oxide, a layer of Ta 2 O 5 , a layer of BaTiO 3 , a layer of HfO 2 , a layer of ZrO 2 , a layer of Al 2 O 3 , a layer of a metal silicate, a layer of HfSi x O y , a layer of HfSi x O y N z or combinations of layers thereof.
6. A method, comprising:
forming one or more copper lower interconnects in a first interlevel dielectric layer;
forming a first intermediate dielectric layer on top of said first interlevel dielectric layer;
forming a trench in said first intermediate dielectric layer, top surfaces of said one or more said lower interconnects exposed in a bottom of said trench;
forming an electrically conductive spreader plate layer on said bottom and on sidewalls of said trench, said spreader plate layer in physical and electrical contact with said one or more copper lower interconnects;
forming a MIM dielectric layer over a top surface of said spreader plate layer;
forming an electrically conductive upper plate layer on a top surface of said MIM dielectric layer;
removing regions of said spreader plate layer, said MIM dielectric layer and said upper plate layer to form a spreader plate, a MIM dielectric block and an upper plate, sidewalls of said spreader plate, said MIM dielectric block and said upper plate essentially co-planer;
forming a second intermediate dielectric layer on top of said first intermediate dielectric layer, a top surface of said second intermediate dielectric layer coplanar with a top surface of said upper plate;
forming a second interlevel dielectric layer on said top surfaces of said second intermediate dielectric layer and said upper plate; and
forming one or more copper upper interconnects in said second interlevel dielectric layer, said one or more upper interconnects in physical and electrical contact with said top surface of said upper plate.
7. The method of claim 6 , further including:
forming a lower plate layer between said spreader plate layer and said MIM dielectric layer; and
simultaneous with said removing regions of said spreader plate layer, said MIM dielectric layer and said upper plate layer, removing regions of said lower plate layer to form a lower plate, sidewalls of said lower plate co-planer with said sidewalls of said spreader plate, said dielectric block and said upper plate.
8. The method of claim 7 ,
wherein said lower and upper plates independently comprise a layer of tantalum, a layer of tantalum nitride, a layer of titanium, a layer of titanium nitride, a layer of tungsten or combinations of layers thereof, and
wherein said dielectric block comprises a layer of a metal oxide, a layer of Ta 2 O 5 , a layer of BaTiO 3 , a layer of HfO 2 , a layer of ZrO 2 , a layer of A 1 2 O 3 , a layer of a metal silicate, a layer of HfSi x O y , a layer of HfSi x O y N z or combinations of layers thereof.