Methods for forming strained-semiconductor-on-insulator device structures by mechanically inducing strain
The benefits of strained semiconductors are combined with silicon-on-insulator approaches to substrate and device fabrication.
1. A method for forming a structure, the method comprising:
forming an unstrained semiconductor layer over a first substrate;
thereafter mechanically inducing strain in the unstrained semiconductor layer to define a first strained semiconductor layer;
bonding the first strained semiconductor layer directly to an insulator layer disposed on a second substrate; and
removing the first substrate from the first strained semiconductor layer, the strained semiconductor layer remaining bonded to the insulator layer.
2. The method of claim 1 , wherein the first strained semiconductor layer is tensilely strained.
3. The method of claim 1 , wherein the first strained semiconductor layer is compressively strained.
4. The method of claim 1 , wherein the first strained semiconductor layer comprises at least one of silicon and germanium.
5. The method of claim 4 , wherein the first strained semiconductor layer comprises approximately 100% silicon.
6. The method of claim 4 , wherein the first strained semiconductor layer comprises approximately 100% germanium.
7. The method of claim 1 , further comprising:
defining a transistor over the second substrate, the transistor including a gate disposed above the first strained semiconductor layer, the gate comprising a material selected from the group consisting of a doped semiconductor, a metal, and a metallic compound.
8. The method of claim 7 , wherein defining the transistor includes defining a gate dielectric layer over first strained semiconductor layer, such that the gate dielectric layer is disposed between the first strained semiconductor layer and the gate.
9. The method of claim 8 , wherein defining the gate dielectric layer comprises atomic layer deposition.
10. The method of claim 1 , wherein the first strained semiconductor layer has a misfit dislocation density of less than about 10 5 cm/cm 2 after the first substrate is removed.
11. The method of claim 1 , wherein the first strained semiconductor layer has a threading dislocation density selected from the range of about 10 dislocations/cm 2 to about 10 7 dislocations/cm 2 after the first substrate is removed.
12. The method of claim 1 , wherein the first strained semiconductor layer has a surface roughness selected from the range of approximately 0.01 nm to approximately 1 nm after the first substrate is removed.
13. The method of claim 1 , wherein the first strained semiconductor layer has a thickness uniformity across the substrate of better than approximately ±10% after the first substrate is removed.
14. The method of claim 1 , wherein the first strained semiconductor layer has a thickness of less than approximately 200 Å after the first substrate is removed.
15. The method of claim 1 , wherein the first strained semiconductor layer has a surface germanium concentration of less than approximately 1×10 12 atoms/cm 2 after the first substrate is removed.
16. The method of claim 1 , wherein the first strained semiconductor layer has a density of bonding voids of less than 0.3 voids/cm 2 after the first substrate is removed.
17. The method of claim 1 , wherein the first strained semiconductor layer comprises at least one of a group II, a group III, a group V, and a group VI element.
18. The method of claim 1 , further comprising:
planarizing the first strained semiconductor layer after the first substrate is removed.
19. The method of claim 1 , wherein bonding the first strained semiconductor layer to the insulator layer comprises plasma activating at least one of a top surface of the first strained semiconductor layer and a top surface of the insulator layer.
20. The method of claim 1 , further comprising:
forming a cleave plane between the first strained semiconductor layer and the first substrate,
wherein removing the first substrate comprises cleaving along the cleave plane.
21. The method of claim 20 , wherein forming the cleave plane comprises at least one of implanting ions and forming a porous layer.
22. The method of claim 1 , further comprising:
removing at least a portion of the first strained semiconductor layer after removing the first substrate.
23. A method for forming a structure, the method comprising:
forming a semiconductor layer over a first substrate;
mechanically inducing strain in the semiconductor layer to define a first strained semiconductor layer;
forming a layer on a backside of the first substrate, the layer comprising at least one of an oxide and a nitride;
after forming the layer on the backside of the first substrate, bonding the first strained semiconductor layer directly to an insulator layer disposed on a second substrate; and
removing the first substrate from the first strained semiconductor layer, the strained semiconductor layer remaining bonded to the insulator layer.
24. The method of claim 23 , wherein forming the semiconductor layer comprises at least one of deposition or epitaxial growth.