IP Library › Granted Patent US 7,612,445
Granted Patent B2
US 7,612,445 · App. 11/740,669 · Granted Nov 3, 2009

Circuit apparatus and method of fabricating the apparatus

Assignee: Sanyo Electric Co., Ltd.
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Quick Facts
Patent No.
US 7,612,445
App. No.
11/740,669
Granted
Nov 3, 2009
Kind
B2
Abstract

The likelihood of exfoliation of a sealing resin layer at a pad electrode part is reduced so that the reliability of a circuit apparatus is improved. A circuit apparatus includes a wiring layer, a gold plating layer, an insulating resin layer, a circuit element, a conductive member and sealing resin layer. The gold plating layer is formed in an wiring layer area for the pad electrode. The surface outside the area is roughened. The insulating resin layer is formed so as to cover the wiring layer and to have an opening in an area in which the pad electrode is formed. The circuit element is mounted on a predetermined area on the insulating resin layer. The sealing resin layer is formed on the insulating resin layer so as to entirely cover the circuit element and the opening for the pad electrode. The sealing resin layer, in the area for the pad electrode, is in contact with the gold plating layer and the wiring layer.

Claims (23)

1. A circuit apparatus comprising:

a substrate;

a copper wiring layer formed on the substrate;

an insulating resin layer formed on the substrate and the wiring layer and having an opening in an area where an electrode pad is formed;

a gold plating layer formed on the electrode pad of the wiring layer surface which is provided in the opening and is used for electrical connection;

a circuit element provided on the substrate;

a conductive member which electrically connects the circuit element and the wiring layer via the gold plating layer; and

a sealing resin layer formed on the insulating resin layer and encapsulating the circuit element and the area where the electrode pad is formed, wherein

the sealing resin layer is in contact with the gold plating layer and the wiring layer.

2. The circuit apparatus according to claim 1 , wherein the circuit element is a semiconductor element.

3. The circuit apparatus according to claim 2 , wherein the semiconductor element is wire bonded using the conductive member.

4. The circuit apparatus according to claim 2 , wherein the semiconductor element is flip chip connected using the conductive member.

5. The circuit apparatus according to claim 1 , wherein the circuit element is a passive element.

6. The circuit apparatus according to claim 1 , wherein the surface of the wiring layer in contact with the sealing resin layer is roughened.

7. The circuit apparatus according to claim 2 , wherein the surface of the wiring layer in contact with the sealing resin layer is roughened.

8. The circuit apparatus according to claim 3 , wherein the surface of the wiring layer in contact with the sealing resin layer is roughened.

9. The circuit apparatus according to claim 4 , wherein the surface of the wiring layer in contact with the sealing resin layer is roughened.

10. The circuit apparatus according to claim 5 , wherein the surface of the wiring layer in contact with the sealing resin layer is roughened.

11. The circuit apparatus according to claim 1 , wherein an area where the sealing resin layer is in contact with the wiring layer is provided around an area where the sealing resin layer is in contact with the gold plating layer.

12. The circuit apparatus according to claim 2 , wherein an area where the sealing resin layer is in contact with the wiring layer is provided around an area where the sealing resin layer is in contact with the gold plating layer.

13. The circuit apparatus according to claim 3 , wherein an area where the sealing resin layer is in contact with the wiring layer is provided around an area where the sealing resin layer is in contact with the gold plating layer.

14. The circuit apparatus according to claim 4 , wherein an area where the sealing resin layer is in contact with the wiring layer is provided around an area where the sealing resin layer is in contact with the gold plating layer.

15. The circuit apparatus according to claim 5 , wherein an area where the sealing resin layer is in contact with the wiring layer is provided around an area where the sealing resin layer is in contact with the gold plating layer.

Assignments (5)
RELEASE OF SECURITY INTEREST IN PATENTS RECORDED AT REEL 038620, FRAME 0087 Recorded Jun 22, 2023
From: DEUTSCHE BANK AG NEW YORK BRANCH, AS COLLATERAL AGENT
To: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC; FAIRCHILD SEMICONDUCTOR CORPORATION
Reel/Frame 064070/0001 →
CORRECTIVE ASSIGNMENT TO CORRECT THE INCORRECT PATENT NUMBER 5859768 AND TO RECITE COLLATERAL AGENT ROLE OF RECEIVING PARTY IN THE SECURITY INTEREST PREVIOUSLY RECORDED ON REEL 038620 FRAME 0087. ASSIGNOR(S) HEREBY CONFIRMS THE SECURITY INTEREST. Recorded Aug 25, 2016
From: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC
To: DEUTSCHE BANK AG NEW YORK BRANCH, AS COLLATERAL AGENT
Reel/Frame 039853/0001 →
SECURITY INTEREST Recorded Apr 15, 2016
From: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC
To: DEUTSCHE BANK AG NEW YORK BRANCH
Reel/Frame 038620/0087 →
ASSIGNMENT OF 50% INTEREST Recorded Jan 8, 2016
From: SANYO ELECTRIC CO., LTD.
To: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC
Reel/Frame 037464/0001 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jul 6, 2007
From: MURAI, MAKOTO; KOHARA, YASUHIRO; USUI, RYOSUKE
To: SANYO ELECTRIC CO., LTD.
Reel/Frame 019523/0584 →
Priority Claims (2)
JP 2006-122954 · Apr 27, 2006 · national
JP 2007-107649 · Apr 16, 2007 · national
Continuity (1)
Related Publication 20070252249A1 · Nov 1, 2007