Phase locked loop apparatus with adjustable phase shift
View Patent ↗The phase locked loop (PLL) with adjustable phase shift is described. The PLL includes a voltage controlled oscillator which is capable of generating multiple phase shifted output signals, and multiple phase detectors capable of determining the phase differences between the output signals and a reference clock. The PLL further includes a weighting device capable of weighting the phase differences and generating a control signal for the voltage controlled oscillator.
1. A phase locked loop with adjustable phase shift, comprising:
a voltage controlled oscillator configured to generate multiple phase shifted output signals;
multiple phase detectors configured to determine phase differences between the phase shifted output signals and a reference clock; and
a weighting device configured to weight the phase differences and generate a control signal, which is based on the weighted phase differences, for the voltage controlled oscillator, wherein a weighting factor, by which the weighting is performed, is dynamically dependent on phase deviations with an input data signal received by a receiver and wherein the weighting effectuates alignment of the multiple phase shifted output signals with the phase of the input data signal.
2. The phase locked loop according to claim 1 , wherein the multiple phase detectors are formed by one or more of XOR-gates or by Gilbert multipliers.
3. The phase locked loop according to claim 1 , where two of the multiple phase detectors which are not simultaneously active have common multiplier elements.
4. The phase locked loop according to claim 1 , wherein the voltage controlled oscillator comprises a multi stage delay line to generate the phase shifted output signals.
5. The phase locked loop according to claim 1 , wherein a voltage-to-current converter and loop filter are coupled between the weighting device and the voltage controlled oscillator.
6. The phase locked loop according to claim 1 , wherein the weighting device comprises multiple digital-analog converters to receive a digital control value and generating therefrom analog weighting factors for weighting the phase differences.
7. The phase locked loop according to claim 6 , wherein the digital-analog converters are binary and thermometer encoded.
8. The phase locked loop according to claim 6 , comprising a switching unit to connect one of the two phase detectors which have common multiplier elements to one of the digital-analog converters.
9. The phase locked loop of claim 1 , wherein the reference clock is not based on the input data signal.
10. A clock and data recovery system, comprising:
a phase locked loop including:
a voltage controlled oscillator configured to generate multiple phase shifted output signals;
multiple phase detectors configured to determine the phase differences between the phase shifted output signals and a reference clock;
a weighting device configured to weight the phase differences and generate a control signal, which is based on the weighted phase differences, for the voltage controlled oscillator, wherein a weighting factor, by which the weighting is performed, is dynamically dependent on phase deviations with an input data signal received by a receiver and wherein the weighting effectuates alignment of the multiple phase shifted output signals with the phase of the input data signal; and
wherein multiple sampling latches capable of intermediately storing received data are connected to the voltage controlled oscillator.
11. The clock and data recovery system of claim 10 , wherein the reference clock is not based on the input data signal.
12. A receiver of a serial data link, comprising:
a phase locked loop including:
a voltage controlled oscillator configured to generate multiple phase shifted output signals;
multiple phase detectors configured to determine the phase differences between the phase shifted output signals and a reference clock; and
a weighting device configured to weight the phase differences and generate a control signal, which is based on the weighted phase differences, for the voltage controlled oscillator, wherein a weighting factor, by which the weighting is performed, is dynamically dependent on phase deviations with an input data signal received by a receiver and wherein the weighting effectuates alignment of the multiple phase shifted output signals with the phase of an input data signal.
13. The receiver of claim 10 , wherein the reference clock is not based on the input data signal.