Stacked integrated circuit package system and method for manufacturing thereof
View Patent ↗A method for manufacturing of a stacked integrated circuit package system includes: providing a base integrated circuit package having a base encapsulation with a cavity therein and a base interposer exposed by the cavity; mounting an intermediate integrated circuit package over the base interposer; and mounting a top integrated circuit package over the intermediate integrated circuit package.
1. A method for manufacturing of a stacked integrated circuit package system comprising:
providing a base integrated circuit package having a base encapsulation with a cavity therein and a base interposer exposed by the cavity;
mounting an intermediate integrated circuit package over the base interposer; and
mounting a top integrated circuit package over the intermediate integrated circuit package.
2. The method as claimed in claim 1 further comprising forming an intermediate intra-stack interconnect between the intermediate integrated circuit package and the top integrated circuit package.
3. The method as claimed in claim 1 further comprising forming a combination package encapsulation over the intermediate integrated circuit package and the top integrated circuit package.
4. The method as claimed in claim 1 wherein providing the base integrated circuit package having the base encapsulation with the cavity therein and the base interposer exposed by the cavity includes providing a base package carrier with the cavity above the base package carrier.
5. The method as claimed in claim 1 wherein providing the base integrated circuit package having the base encapsulation with the cavity therein and the base interposer exposed by the cavity includes providing a base package carrier with the cavity below the base package carrier.
6. A stacked integrated circuit package system comprising:
a base integrated circuit package having a base encapsulation with a cavity therein and a base interposer exposed by the cavity;
an intermediate integrated circuit package mounted over the base interposer; and
a top integrated circuit package mounted over the intermediate integrated circuit package.
7. The system as claimed in claim 6 further comprising an intermediate intra-stack interconnect between the intermediate integrated circuit package and the top integrated circuit package.
8. The system as claimed in claim 6 further comprising a combination package encapsulation formed over the intermediate integrated circuit package and the top integrated circuit package.
9. The system as claimed in claim 6 wherein the base integrated circuit package includes the base package carrier with the cavity above the base package carrier.
10. The system as claimed in claim 6 wherein the base integrated circuit package includes the base package carrier with the cavity below the base package carrier.
11. The system as claimed in claim 6 further comprising a base intra-stack interconnect between the base integrated circuit package and the intermediate integrated circuit package.
12. The system as claimed in claim 11 further comprising an external interconnect below the base interposer.
13. The system as claimed in claim 11 wherein the base intra-stack interconnect is formed over the base interposer and in the cavity.
14. The system as claimed in claim 11 wherein the base intra-stack interconnect couples the base interposer to the intermediate integrated circuit package.
15. The system as claimed in claim 11 wherein:
the base integrated circuit package includes a base package carrier; and
the base intra-stack interconnect couples the base package carrier to the intermediate integrated circuit package.