IP Library › Granted Patent US 8,152,048
Granted Patent B2
US 8,152,048 · App. 12/331,154 · Granted Apr 10, 2012

Method and structure for adapting solder column to warped substrate

Assignees: Taiwan Semiconductor Manufacturing Co., Ltd.; Global Unichip Corporation
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Quick Facts
Patent No.
US 8,152,048
App. No.
12/331,154
Granted
Apr 10, 2012
Kind
B2
Abstract

A multiple substrate system, a method, and structure for adapting solder volume to a warped module. An illustrative embodiment comprises a method for joining a first substrate to a second substrate. A deviation from a nominal gap between the first substrate and the second substrate at a first region of the first substrate is ascertained. A volume of solder paste necessary to compensate for the deviation from a nominal gap is determined. The volume of solder paste necessary to compensate for the deviation at the first region of the first substrate is applied. Further, the second substrate is bonded to the first substrate using, at least in part, the solder paste applied at the first region of the first substrate.

Claims (15)

1. A method of joining a first substrate to a second substrate, the method comprising:

ascertaining a deviation from a nominal gap between the first substrate and the second substrate at a first region of the first substrate;

binning the first substrate according to the ascertained deviation;

determining a volume of solder paste necessary to compensate for the deviation from the nominal gap;

selecting from amongst a plurality of adapted stencils, an adapted stencil for applying solder paste to the first substrate, the selection being based upon the bin in which the first substrate is binned;

applying the volume of solder paste necessary to compensate for the deviation at the first region of the first substrate; and

bonding the second substrate to the first substrate using, at least in part, the solder paste applied at the first region of the first substrate.

2. The method of claim 1 , wherein one or both of the substrates are warped.

3. The method of claim 1 , wherein the deviation from the nominal gap is ascertained by analysis of the design parameters of the first substrate, the second substrate, or both substrates.

4. The method of claim 1 , wherein the deviation from the nominal gap is ascertained by measuring either the first substrate, the second substrate, or both substrates.

5. The method of claim 4 , wherein the measuring is accomplished using a shadow moiré technique.

6. The method of claim 1 , wherein applying the volume of solder paste to compensate for the deviation at the first region of the first substrate employs a stencil comprising an aperture that is adjusted to allow the determined amount of solder through the stencil.

7. The method of claim 1 , wherein the volume of solder paste necessary to compensate for the deviation is calculated by Volume=πR o 2 (H o +G), wherein R o is a radius of a nominal aperture, H o is a nominal solder column height, and G is the deviation of the solder column height from the nominal solder column height.

8. The method of claim 1 , wherein applying the volume of solder paste necessary to compensate for the deviation comprises squeezing solder paste through a stencil having an aperture with a calculated radius.

9. The method of claim 8 , wherein the radius of an adapted stencil aperture is calculated by R adapted stencil-aperture =(2(πR o 2 (H o +G)−4/3πR ball 3 )/πH stencil ) 1/2 , wherein R o is the radius of a nominal aperture, H o is a nominal solder column height, G is the deviation of the solder column height from the nominal solder column height, R ball is the radius of a solder ball, and H stencil is the thickness of the stencil.

Assignments (2)
CORRECTIVE ASSIGNMENT TO CORRECT THE PLEASE CORRECT THE RECEIVING PARTY DATA TO ADD GLOBAL UNICHIP CORP. PREVIOUSLY RECORDED ON REEL 021949 FRAME 0688. ASSIGNOR(S) HEREBY CONFIRMS THE ASSIGNMENT. Recorded Apr 8, 2010
From: ZU, LONGQIANG
To: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.; GLOBAL UNICHIP CORP.
Reel/Frame 024205/0041 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Dec 9, 2008
From: ZU, LONGQIANG
To: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
Reel/Frame 021949/0688 →
Continuity (1)
Related Publication 20100143656A1 · Jun 10, 2010