IP Library Granted Patent US 8,855,452
Granted Patent B2
US 8,855,452 · App. 13/353,118 · Granted Oct 7, 2014

Silicon photonic chip optical coupling structures

Inventors: Paul S. Andry (Yorktown Heights, NY); Russell A. Budd (North Salem, NY); Frank R. Libsch (White Plains, NY); Robert L. Wisnieff (Ridgefield, CT)
Assignee: International Business Machines Corporation
View Patent ↗
Loading inventors, assignments & file history…
Monitor This Case
Get email alerts when status or documents change.
Order Certified Copies
Most orders are placed with the USPTO same day — all within 24 business hours.
Order via The Patent Place →
Pre-filled with this patent's details
Quick Facts
Patent No.
US 8,855,452
App. No.
13/353,118
Granted
Oct 7, 2014
Kind
B2
Abstract

A silicon photonic chip is provided. An active silicon layer that includes a photonic device is on a front side of the silicon photonic chip. A silicon substrate that includes an etched backside cavity is on a backside of the silicon photonic chip. A microlens is integrated into the etched backside cavity. A buried oxide layer is located between the active silicon layer and the silicon substrate. The buried oxide layer is an etch stop for the etched backside cavity.

Claims (40)

1. A silicon photonic chip, the silicon photonic chip comprising:

an active silicon layer that includes a photonic device, wherein the active silicon layer is on a front side of the silicon photonic chip;

a silicon substrate that includes an etched backside cavity, wherein the silicon substrate is on a backside of the silicon photonic chip;

a microlens integrated into the etched backside cavity, wherein the microlens collimates optical signals from the silicon photonic chip to an optical fiber connector having an integrated microlens positioned on the backside of the silicon photonic chip; and

a buried oxide layer located between the active silicon layer and the silicon substrate, wherein the buried oxide layer is an etch stop for the etched backside cavity.

2. The silicon photonic chip of claim 1 , further comprising:

a reflective structure located on the front side of the silicon photonic chip, wherein the photonic device is located between the etched backside cavity and the reflective structure.

3. The silicon photonic chip of claim 1 , wherein the photonic device is a diffractive grating coupler that diffracts optical signals to and from the active silicon layer.

4. The silicon photonic chip of claim 1 , wherein the microlens is an optical polymer material that is curable by ultraviolet light, and wherein the optical polymer material is molded into the microlens during a fabrication process of the silicon photonic chip using a transparent, lens-shaped mold.

5. The silicon photonic chip of claim 1 , wherein the microlens is recessed within the etched backside cavity to protect the microlens from damage.

6. The silicon photonic chip of claim 1 , wherein the microlens and the optical fiber connector having the integrated microlens provides an optical signal misalignment tolerance of 10-15 micrometers between the microlens and the optical fiber connector having the integrated microlens.

7. The silicon photonic chip of claim 1 , wherein the etched backside cavity is one of a plurality of etched backside cavities with integrated microlenses in the silicon substrate, and wherein each of the plurality of etched backside cavities is cylindrical in shape.

8. The silicon photonic chip of claim 4 , wherein the microlens is optically aligned with the photonic device during a fabrication process of the silicon photonic chip using an optical alignment device that looks through the transparent, lens-shaped mold.

9. The silicon photonic chip of claim 8 , wherein an optical misalignment tolerance between the microlens and the photonic device is less than one micrometer.

10. The silicon photonic chip of claim 2 , wherein the reflective structure reflects optical signals diffracted toward the front side of the silicon photonic chip to the microlens located on the backside of the silicon photonic chip.

11. A silicon photonic chip, the silicon photonic chip comprising:

an active silicon layer that includes a photonic device, wherein the active silicon layer is on a front side of the silicon photonic chip;

a silicon substrate that includes an etched backside cavity, wherein the silicon substrate is on a backside of the silicon photonic chip; and

a reflective structure located in the etched backside cavity adjacent to a backside surface of a buried oxide layer that is located between the active silicon layer and the silicon substrate.

12. The silicon photonic chip of claim 11 , wherein the etched backside cavity is aligned with the photonic device.

13. The silicon photonic chip of claim 11 , wherein the photonic device is located between the reflective structure in the etched backside cavity and an optical fiber connector positioned on the front side of the silicon photonic chip.

14. The silicon photonic chip of claim 13 , wherein the reflective structure reflects optical signals diffracted toward a backside of the silicon photonic chip to the optical fiber connector positioned on the front side of the silicon photonic chip.

15. The silicon photonic chip of claim 11 , wherein the reflective structure is one of a mirror or a thin metal film.

16. The silicon photonic chip of claim 11 , wherein a silicon dioxide material is located in the etched backside cavity on a backside of the reflective structure.

17. A silicon photonic chip, the silicon photonic chip comprising:

an active silicon layer that includes a photonic device, wherein the active silicon layer is on a front side of the silicon photonic chip;

a silicon substrate that includes an etched backside cavity, wherein the silicon substrate is on a backside of the silicon photonic chip;

a microlens integrated into the etched backside cavity, wherein the microlens collimates optical signals from the silicon photonic chip to an optical fiber connector having an integrated microlens positioned on the backside of the silicon photonic chip;

a buried oxide layer located between the active silicon layer and the silicon substrate, wherein the buried oxide layer is an etch stop for the etched backside cavity; and

a reflective structure located on the front side of the silicon photonic chip, wherein the photonic device is located between the etched backside cavity and the reflective structure.

18. The silicon photonic chip of claim 17 , wherein the microlens is recessed within the etched backside cavity to protect the microlens from damage.

19. The silicon photonic chip of claim 17 , wherein the optical fiber connector having the integrated microlens includes a 45 degree optical signal reflective turning structure that turns an optical signal 90 degrees to and from an optical fiber that is positioned parallel with the silicon photonic chip.

20. A silicon photonic chip, the silicon photonic chip comprising:

an active silicon layer that includes a photonic device, wherein the active silicon layer is on a front side of the silicon photonic chip;

a silicon substrate that includes an etched backside cavity, wherein the silicon substrate is on a backside of the silicon photonic chip;

a first reflective structure located in the etched backside cavity adjacent to a backside surface of a buried oxide layer located between the active silicon layer and the silicon substrate; and

a single mode waveguide connector having an integrated photonic device located on the front side of the silicon photonic chip opposite the etched backside cavity, wherein the single mode waveguide connector having the integrated photonic device is located in a space created by a conductive bump layer between the silicon photonic chip and a chip carrier.

21. The silicon photonic chip of claim 20 , wherein the single mode waveguide connector having the integrated photonic device includes a second reflective structure.

22. The silicon photonic chip of claim 21 , wherein the single mode waveguide connector having the integrated photonic device optically couples the silicon photonic chip to an optical fiber connector.

23. The silicon photonic chip of claim 21 , wherein the single mode waveguide connector having the integrated photonic device is an optical polymer material with a core of higher optical refractive index material and an outer layer of cladding consisting of one or more layers of lower refractive index material.

Assignments (7)
RELEASE OF SECURITY INTEREST Recorded May 12, 2021
From: WILMINGTON TRUST, NATIONAL ASSOCIATION
To: GLOBALFOUNDRIES U.S. INC.
Reel/Frame 056987/0001 →
RELEASE OF SECURITY INTEREST Recorded Nov 20, 2020
From: WILMINGTON TRUST, NATIONAL ASSOCIATION
To: GLOBALFOUNDRIES INC.
Reel/Frame 054636/0001 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Nov 2, 2020
From: GLOBALFOUNDRIES INC.
To: GLOBALFOUNDRIES U.S. INC.
Reel/Frame 054633/0001 →
SECURITY AGREEMENT Recorded Nov 29, 2018
From: GLOBALFOUNDRIES INC.
To: WILMINGTON TRUST, NATIONAL ASSOCIATION
Reel/Frame 049490/0001 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Oct 5, 2015
From: GLOBALFOUNDRIES U.S. 2 LLC; GLOBALFOUNDRIES U.S. INC.
To: GLOBALFOUNDRIES INC.
Reel/Frame 036779/0001 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Sep 3, 2015
From: INTERNATIONAL BUSINESS MACHINES CORPORATION
To: GLOBALFOUNDRIES U.S. 2 LLC
Reel/Frame 036550/0001 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jan 23, 2012
From: ANDRY, PAUL S.; BUDD, RUSSELL A.; LIBSCH, FRANK R.; WISNIEFF, ROBERT L.
To: INTERNATIONAL BUSINESS MACHINES CORPORATION
Reel/Frame 027574/0870 →
Continuity (1)
Related Publication 20130182998A1 · Jul 18, 2013