IP Library › Granted Patent US 8,981,471
Granted Patent B2
US 8,981,471 · App. 13/982,668 · Granted Mar 17, 2015

Insulated gate semiconductor device

Inventors: Haruyoshi Yagi (Edogawa-ku, JP); Manabu Yajima (Ota, JP)
Assignee: Semiconductor Components Industries, LLC
H01L29/7808H01L21/823475H01L27/0255H01L27/0629H01L29/0696H01L29/7811H01L29/7813H01L23/4824H01L29/42372H01L29/4238H01L29/7397H01L29/7803H01L24/13H01L27/0207H01L29/0619H01L2924/01082H01L2924/01006H01L2924/13091H01L2924/13055H01L2224/05569H01L2224/1415H01L2224/05008H01L2224/05567H01L2224/13022H01L2224/05572H01L29/87H01L29/0692H01L24/05H01L2224/0401
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Quick Facts
Patent No.
US 8,981,471
App. No.
13/982,668
Granted
Mar 17, 2015
Kind
B2
Abstract

In a MOSFET, the lead parts of gate lead wiring that lead out a gate electrode on the periphery of a substrate constitute a non-operative region. If the gate lead wiring is disposed along the four edges of a chip, the area of the non-operative region increases. In the present invention, gate lead wiring and a conductor, which is connected to the gate lead wiring and a protection diode, are disposed in a non-curved, linear configuration along one edge of a chip. In addition, a first gate electrode layer that extends superimposed on the gate lead wiring and the conductor, and connects the gate lead wiring and the conductor to the protection diode, has no more than one curved part. Furthermore, the protection diode is disposed adjacent to the conductor or the gate lead wiring, and a portion of the protection diode is disposed near a gate pad.

Claims (21)

1. An insulated-gate semiconductor device comprising:

a first semiconductor layer of a first general conductivity type;

an element region provided in a surface of the first semiconductor layer of the first general conductivity type, and having a transistor cell of an insulated-gate semiconductor element arranged therein;

a gate pad portion provided on the element region and connected to a gate electrode of the transistor cell;

a protection diode connected between a source electrode and the gate electrode of the transistor cell;

a gate lead wiring disposed on a peripheral portion of the first semiconductor layer of the first general conductivity type, and leading out the gate electrode onto the first semiconductor layer of the first general conductivity type and connect the gate electrode to the gate pad portion; and

a conductor connected to the gate lead wiring and the protection diode, wherein

the gate lead wiring and the conductor are provided along one side of the first semiconductor layer of the first general conductivity type linearly without bending.

2. The insulated-gate semiconductor device according to claim 1 , wherein the protection diode, the gate lead wiring, and the conductor are arranged adjacently.

3. The insulated-gate semiconductor device according to claim 1 , wherein the protection diode is disposed along the one side.

4. The insulated-gate semiconductor device according to claim 1 , wherein the protection diode is disposed in close proximity to the gate pad portion.

5. The insulated-gate semiconductor device according to claim 1 , wherein

a first gate electrode layer extending on the gate lead wiring and the conductor and being connected to one end of the protection diode is provided, and

the first gate electrode layer bents at most at one portion.

6. The insulated-gate semiconductor device according to claim 1 , wherein

a second gate electrode layer connected to the first gate electrode layer on the protection diode is provided, and

the gate pad portion is a portion of the second gate electrode layer.

7. The insulated-gate semiconductor device according to claim 1 , wherein

the first semiconductor layer of the first general conductivity type is in the form of a rectangle having short sides and long sides,

the gate electrode has a stripe shape and extends along the long sides, and

the gate lead wiring is disposed along one of the short sides.

Assignments (4)
RELEASE OF SECURITY INTEREST IN PATENTS RECORDED AT REEL 038620, FRAME 0087 Recorded Jun 22, 2023
From: DEUTSCHE BANK AG NEW YORK BRANCH, AS COLLATERAL AGENT
To: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC; FAIRCHILD SEMICONDUCTOR CORPORATION
Reel/Frame 064070/0001 →
CORRECTIVE ASSIGNMENT TO CORRECT THE INCORRECT PATENT NUMBER 5859768 AND TO RECITE COLLATERAL AGENT ROLE OF RECEIVING PARTY IN THE SECURITY INTEREST PREVIOUSLY RECORDED ON REEL 038620 FRAME 0087. ASSIGNOR(S) HEREBY CONFIRMS THE SECURITY INTEREST. Recorded Aug 25, 2016
From: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC
To: DEUTSCHE BANK AG NEW YORK BRANCH, AS COLLATERAL AGENT
Reel/Frame 039853/0001 →
SECURITY INTEREST Recorded Apr 15, 2016
From: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC
To: DEUTSCHE BANK AG NEW YORK BRANCH
Reel/Frame 038620/0087 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Aug 13, 2013
From: YAGI, HARUYOSHI; YAJIMA, MANABU
To: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC
Reel/Frame 030994/0992 →
Priority Claims (1)
JP 2011-032342 · Feb 17, 2011 · national
Continuity (1)
Related Publication 20140001539A1 · Jan 2, 2014