Integration of dense and variable pitch fin structures
Semiconductor devices include a first set of fins having a uniform fin pitch that is less than half a minimum fin pitch for an associated lithography process; and a second set of fins having a variable fin pitch that is less the minimum fin pitch for the associated lithography process but greater than half the minimum fin pitch for the associated lithography process.
1. A semiconductor device, comprising:
a first set of fins having a uniform fin pitch that is less than half a minimum fin pitch for a lithography process being used; and
a second set of fins having a variable fin pitch that is less the minimum fin pitch for the lithography process but greater than half the minimum fin pitch for the lithography process.
2. The semiconductor device of claim 1 , comprising one or more static random access memory cells formed from the second set of fins.
3. The semiconductor device of claim 1 , wherein the fins stand on a substrate layer.
4. The semiconductor device of claim 1 , wherein the fins are formed from amorphous carbon.