3-D integration using multi stage vias
A TSV can be formed having a top section via formed through the top substrate surface and a bottom section via formed through the bottom substrate surface. The top section cross section can have a minimum cross section corresponding to design rules, and the top section depth can correspond to a workable aspect ratio. The top section via can be filled or plugged so that top side processing can be continued. The bottom section via can have a larger cross section for ease of forming a conductive path therethrough. The bottom section via extends from the back side to the bottom of the top section via and is formed after the substrate has been thinned. The TSV is can be completed by forming a conductive path after removing sacrificial fill materials from the joined top and bottom section vias.
1. A method to form a via through a substrate having a front side, a back side, and an initial depth, the method comprising:
providing said substrate having a blind via formed through said front side, said blind via having a front end sealed by fill material, and said blind via filled with said fill material, said front end abutting a contact disposed above said front side, said blind via having a back end within said substrate, said blind via extending into said substrate less than said initial depth;
forming a back side via that extends through said back side and opens said back end to form a multi-stage cavity;
forming a protective layer on a surface of said substrate comprising a nitrogen and hydrogen doped silicon carbide;
removing said fill material to expose said contact;
further comprising conformally depositing a conductive material on the contact and over sidewalls of said back side via; and
filling the back side via with a dielectric material, thereby forming an annular conductive path.
2. The method of claim 1 further comprising prior to said step of providing said substrate:
forming said blind via through said top surface,
applying fill material to seal said front end, and
forming said contact abutting said top end.
3. The method of claim 2 wherein at least one semiconductor device is formed in said front side after said step of forming said blind via.
4. The method of claim 1 further comprising prior to said step of forming a back side via:
attaching a carrier to said substrate;
removing a layer of said back side whereby said substrate achieves a final depth, wherein said blind via extends into said substrate less than said final depth.
5. The method of claim 1 wherein said blind via is lined with thermal oxide.
6. The method of claim 2 wherein said blind via is formed by retrograde etch.