Memory cells, non-volatile memory arrays, methods of operating memory cells, methods of writing to and writing from a memory cell, and methods of programming a memory cell
In one aspect, a method of operating a memory cell includes using different electrodes to change a programmed state of the memory cell than are used to read the programmed state of the memory cell. In one aspect, a memory cell includes first and second opposing electrodes having material received there-between. The material has first and second lateral regions of different composition relative one another. One of the first and second lateral regions is received along one of two laterally opposing edges of the material. Another of the first and second lateral regions is received along the other of said two laterally opposing edges of the material. At least one of the first and second lateral regions is capable of being repeatedly programmed to at least two different resistance states. Other aspects and implementations are disclosed.
1. A method of programming a memory cell comprising a pair of opposing conductive electrodes having resistance switchable material received there-between, comprising:
applying an electric field through the resistance switchable material in a prevailingly laterally oriented direction to cause mobile dopants within the resistance switchable material to move laterally toward or away from one of opposing lateral edges of the resistance switchable material to change resistance between the pair of electrodes, the opposing conductive electrodes of the pair being pulled to substantially the same voltage during said applying.
2. The method of claim 1 wherein each of the pair of opposing conductive electrodes is pulled to 0V during said applying.
3. A method of programming a memory cell comprising a pair of opposing conductive electrodes having resistance switchable material received there-between, comprising:
applying an electric field through the resistance switchable material in a prevailingly laterally oriented direction to cause mobile dopants within the resistance switchable material to move laterally toward or away from one of opposing lateral edges of the resistance switchable material to change resistance between the pair of electrodes, no external voltage being applied to the pair of opposing conductive electrodes during said applying.
4. A method of writing to a cross point memory cell of an array of cross point memory cells comprising a plurality of word lines and a plurality of bit lines crossing the plurality of word lines, individual of the cross point memory cells comprising a different one of the crossings of the plurality of word lines and the plurality of bit lines relative to one another, the method comprising:
writing to a memory cell by applying a differential write voltage between the two immediately adjacent bit lines which are on opposing lateral sides of said memory cell, the individual memory cells comprising resistance switchable material received between the crossing word lines and bit lines, the writing comprising switching the resistance of the resistance switchable material between at least two different resistance states.
5. The method of claim 4 wherein the two immediately adjacent bit lines are electrically insulated from the memory cell.
6. The method of claim 4 wherein the writing comprises causing mobile dopants within the resistance switchable material to move laterally toward or away from one of opposing lateral edges of the resistance switchable material.
7. The method of claim 6 wherein the writing moves the mobile dopants toward the one lateral edge to form a conductive channel which is localized along the one lateral edge.
8. The method of claim 7 wherein the writing forms the conductive channel to be of constant lateral width between the crossing word line and bit line of the memory cell.
9. The method of claim 8 wherein the writing forms the conductive channel to be of constant conductivity per unit length of the channel between the crossing bit line and crossing word line of the memory cell.
10. The method of claim 8 wherein the writing forms the conductive channel to be more conductive per unit length of the channel more proximate the crossing bit line of the memory cell than proximate the crossing word line of the memory cell.
11. The method of claim 7 wherein the writing forms the conductive channel to be of variable lateral width between the crossing word line and bit line of the memory cell.
12. The method of claim 11 wherein the writing forms the conductive channel to be wider more proximate the crossing bit line of the memory cell than proximate the crossing word line of the memory cell.
13. The method of claim 12 wherein the writing forms the conductive channel to be of constant conductivity per unit length of the channel between the crossing bit line and crossing word line of the memory cell.
14. The method of claim 12 wherein the writing forms the conductive channel to be more conductive per unit length of the channel more proximate the crossing bit line of the memory cell than proximate the crossing word line of the memory cell.
15. The method of claim 11 wherein the writing forms the lateral width of the conductive channel to taper.
16. The method of claim 6 wherein,
the resistance switchable material comprises a conductive channel of the mobile dopants which is localized along the one lateral edge; and
the writing moves the mobile dopants away from the one lateral edge to remove the conductive channel.
17. The method of claim 4 wherein the writing is simultaneously to multiple memory cells received between said pair of immediately adjacent bit lines.
18. The method of claim 4 further comprising during the writing, applying a voltage to at least some other word lines other than the crossing word line of the memory cell and that is different from any voltage that is applied to the crossing word line.
19. The method of claim 18 wherein the applying of the voltage to at least some other word lines results in an electric field component directionally different from an electric field component resulting from applying of the differential write voltage.
20. The method of claim 18 wherein the applying of the voltage to at least some other word lines prevents other memory cells associated with the other word lines from being written to by the differential write voltage.
21. A memory cell comprising:
first and second opposing electrodes having resistance switchable material received there-between, the resistance switchable material being capable of being programmed to at least two different resistance states, the resistance switchable material in a lowest resistance state comprising a conductive channel localized along only one of two laterally opposing edges of the resistance switchable material and extending toward and away from the first and second electrodes, the resistance switchable material having a minimum elevational thickness that is at least twice as great as its minimum lateral width.