Transistor formation method using sidewall masks
There is provided a method of fabricating a semiconductor device including forming a first film on a base layer, forming a first mask pattern on the first film, the first mask pattern having mask portions arranged at a given pitch, forming first sidewall films on sidewalls of the first mask pattern by etchback of a deposited second film, removing the first mask pattern, and forming a second mask pattern composed of the first sidewall films and second sidewall films defined by etchback of a deposited third film. It is possible to form a stripe pattern with the line width and the line space thereof having the same sizes and at a pitch the same as the minimum process size determined by the photolithographic performance, thereby enabling fabrication of a semiconductor device with a high degree of integration.
1. A method for fabricating a semiconductor device comprising:
forming a first film on a base layer;
forming a first mask pattern on the first film, the first mask pattern having first mask portions and sidewalls, wherein a width of each of the first mask portions and a space between adjacent first mask portions are the same;
forming first sidewall films on the sidewalls of the first mask pattern by etch back of a deposited second film, each of the first sidewall films comprising a vertical side surface and a curved side surface;
removing the first mask pattern;
forming second sidewall films by etchback of a deposited third film on the first sidewall films, the second sidewall films comprising first portions adjacent to the vertical side surfaces and second portions adjacent to the curved side surfaces of the first sidewall films;
wherein the first portions of the second sidewall films have a width of one-quarter the width of each first mask portion, and wherein the first sidewall films and the second sidewall films define portions of a second mask pattern.
2. The method as claimed in claim 1 , further comprising:
forming the second mask pattern on the first film disposed over the base layer.
3. The method as claimed in claim 2 , further comprising:
forming a first gate insulating film and a first conductive layer on a semiconductor substrate to form the base layer; and
etching the base layer with the second mask pattern, wherein the second mask pattern is selectively etched to form a third mask pattern, and wherein using the third mask pattern to selectively etch the base layer so that a trench reaching the semiconductor substrate is formed.
4. The method as claimed in claim 1 , wherein the first film, the first mask pattern, the second film and the third film are respectively either insulating films or polysilicon films.
5. The method as claimed in claim 1 , wherein each of the portions of the second mask pattern has a width that is half the width of each first mask portion.
6. The method as claimed in claim 2 , further comprising:
forming a third mask pattern by etching the first film having the second mask pattern; and
etching the base layer with the third mask pattern after removal of the second mask pattern.