Light emitting device
A light emitting device is provided which can prevent a change in gate voltage due to leakage or other causes and at the same time can prevent the aperture ratio from lowering. A capacitor storage is formed from a connection wiring line, an insulating film, and a capacitance wiring line. The connection wiring line is formed over a gate electrode and an active layer of a TFT of a pixel, and is connected to the active layer. The insulating film is formed on the connection wiring line. The capacitance wiring line is formed on the insulating film. This structure enables the capacitor storage to overlap the TFT, thereby increasing the capacity of the capacitor storage while keeping the aperture ratio from lowering. Accordingly, a change in gate voltage due to leakage or other causes can be avoided to prevent a change in luminance of an OLED and flickering of screen in analog driving.
1. A display device including a pixel portion, the pixel portion comprising:
a semiconductor layer over a substrate;
a gate insulating film over the semiconductor layer;
a gate electrode over the gate insulating film, the gate electrode overlapping with the semiconductor layer;
a transistor;
a first insulating film over the gate electrode, the gate insulating film, and the transistor;
a first wiring over the first insulating film, the first wiring electrically connected to the semiconductor layer through a contact hole in the gate insulating film and the first insulating film;
a second insulating film over the first wiring;
a third insulating film over the second insulating film, the third insulating film including a region where the third insulating film is removed;
a pixel electrode over and in contact with the third insulating film, the pixel electrode electrically connected to the transistor; and
a second wiring over and in contact with the third insulating film,
wherein the semiconductor layer comprises silicon, and
wherein the region overlaps with the contact hole.
2. The display device according to claim 1 ,
wherein the first wiring and the second wiring overlap with each other, and
wherein the second insulating film is positioned between the first wiring and the second wiring.
3. The display device according to claim 1 , wherein the second wiring is in contact with a top surface of the second insulating film.
4. The display device according to claim 1 , wherein the second wiring is a capacitance wiring.
5. The display device according to claim 1 , wherein the first wiring overlaps with the gate electrode.
6. The display device according to claim 1 , wherein the first wiring is electrically connected to the transistor.
7. The display device according to claim 1 , wherein the first wiring is in contact with a top surface of the semiconductor layer.
8. The display device according to claim 1 , wherein the semiconductor layer includes a crystalline semiconductor obtained by crystallization treatment to an amorphous semiconductor.
9. A display module comprising:
the display device according to claim 1 ; and
an FPC connected to the display device.
10. An electric apparatus comprising:
the display device according to claim 1 ; and
at least one of a battery, an antenna, an audio input unit, a speaker unit, and an image receiving unit.
11. A display device including a pixel portion, the pixel portion comprising:
a plastic substrate;
a semiconductor layer over the plastic substrate;
a gate insulating film over the semiconductor layer;
a gate electrode over the gate insulating film, the gate electrode overlapping with the semiconductor layer;
a transistor;
a first insulating film over the gate electrode, the gate insulating film, and the transistor;
a first wiring over the first insulating film, the first wiring electrically connected to the semiconductor layer through a contact hole in the gate insulating film and the first insulating film;
a second insulating film over the first wiring;
a third insulating film over the second insulating film, the third insulating film including a region where the third insulating film is removed;
a pixel electrode over and in contact with the third insulating film, the pixel electrode electrically connected to the transistor; and
a second wiring over and in contact with the third insulating film,
wherein the semiconductor layer comprises silicon, and
wherein the region overlaps with the contact hole.
12. The display device according to claim 11 ,
wherein the first wiring and the second wiring overlap with each other, and
wherein the second insulating film is positioned between the first wiring and the second wiring.
13. The display device according to claim 11 , wherein the second wiring is in contact with a top surface of the second insulating film.
14. The display device according to claim 11 , wherein the second wiring is a capacitance wiring.
15. The display device according to claim 11 , wherein the first wiring overlaps with the gate electrode.
16. The display device according to claim 11 , wherein the first wiring is electrically connected to the transistor.
17. The display device according to claim 11 , wherein the first wiring is in contact with a top surface of the semiconductor layer.
18. The display device according to claim 11 , wherein the semiconductor layer includes a crystalline semiconductor obtained by crystallization treatment to an amorphous semiconductor.
19. A display module comprising:
the display device according to claim 11 ; and
an FPC connected to the display device.
20. An electric apparatus comprising:
the display device according to claim 11 ; and
at least one of a battery, an antenna, an audio input unit, a speaker unit, and an image receiving unit.