IP Library › Granted Patent US 9,418,923
Granted Patent B2
US 9,418,923 · App. 14/033,862 · Granted Aug 16, 2016

Semiconductor component having through-silicon vias and method of manufacture

Inventors: Chen-Hua Yu (Hsinchu, TW); Cheng-Hung Chang (Hsinchu, TW); Ebin Liao (Xinzhu, TW); Chia-Lin Yu (Sigang Township, TW); Hsiang-Yi Wang (Hsinchu, TW); Chun Hua Chang (Zhubie, TW); Li-Hsien Huang (Puzi, TW); Darryl Kuo (Hsinchu, TW); Tsang-Jiuh Wu (Hsinchu, TW); Wen-Chih Chiou (Toufen, TW)
Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
H01L23/49827H01L21/76846H01L21/76898H01L23/481H01L21/76831H01L21/76832H01L2225/06541H01L2225/06544H01L2924/0002
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Quick Facts
Patent No.
US 9,418,923
App. No.
14/033,862
Granted
Aug 16, 2016
Kind
B2
Abstract

A semiconductor component includes a semiconductor substrate having an opening A first dielectric liner having a first compressive stress is disposed in the opening. A second dielectric liner having a tensile stress is disposed on the first dielectric liner. A third dielectric liner having a second compressive stress disposed on the second dielectric liner.

Claims (11)

1. A semiconductor component comprising:

a semiconductor substrate having an opening, wherein the opening has a top portion and a bottom portion;

a first dielectric liner disposed over an interior surface of the opening, the first dielectric liner having a thickness T 1 on the top portion and a thickness T 2 on the bottom portion, wherein R 1 is a ratio of T 1 to T 2 ;

a second dielectric liner disposed over the first dielectric liner, the second dielectric liner having a thickness T 3 on the top portion and a thickness T 4 on the bottom portion, wherein R 2 is a ratio of T 3 to T 4 , and R 1 is greater than R 2 ; and

a conductive material disposed over the second dielectric liner.

2. The semiconductor component of claim 1 , wherein R 1 ranges from about 5 to about 20.

3. The semiconductor component of claim 1 , wherein the semiconductor substrate has a thickness ranging from about 10 microns (μm) to about 200 μm.

4. The semiconductor component of claim 1 , wherein R 2 ranges from about 1 to about 5.

5. The semiconductor component of claim 1 , further comprising a third dielectric liner between the second dielectric liner and the conductive material, the third dielectric liner has a thickness T 5 on the top portion and a thickness T 6 on the bottom portion, wherein R 3 is a ratio of T 5 to T 6 , and R 3 is greater than R 2 .

6. The semiconductor component of claim 5 , wherein R 3 ranges from about 5 to about 20.

7. The semiconductor component of claim 5 , wherein an etching rate of the first dielectric liner in an HF solution is different from an etching rate of the second dielectric liner in the HF solution.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Sep 23, 2013
From: YU, CHEN-HUA; CHANG, CHENG-HUNG; LIAO, EBIN; YU, CHIA-LIN; WANG, HSIANG-YI; CHANG, CHUN HUA; HUANG, LI-HSIEN; KUO, DARRYL; WU, TSANG-JIUH; CHIOU, WEN-CHIH
To: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
Reel/Frame 031259/0044 →
Continuity (3)
Continuation 13799760 · Mar 13, 2013
Division 13085668 · Apr 13, 2011
Related Publication 20140015146A1 · Jan 16, 2014