Transistor with threshold voltage set notch and method of fabrication thereof
A structure and method of fabrication thereof relate to a Deeply Depleted Channel (DDC) design, allowing CMOS based devices to have a reduced σV T compared to conventional bulk CMOS and can allow the threshold voltage V T of FETs having dopants in the channel region to be set much more precisely. A novel dopant profile indicative of a distinctive notch enables tuning of the V T setting within a precise range. This V T set range may be extended by appropriate selection of metals so that a very wide range of V T settings is accommodated on the die. The DDC design also can have a strong body effect compared to conventional bulk CMOS transistors, which can allow for significant dynamic control of power consumption in DDC transistors. The result is the ability to independently control V T (with a low σV T ) and V DD , so that the body bias can be tuned separately from V T for a given device.
1. An integrated circuit die containing multiple device types, comprising:
a plurality of doped wells, with at least some secondarily doped to form a screening layer for a device of a first type, and at least some supporting a second device type;
a threshold voltage tuning layer on the screening layer of the device of the first type doped to provide a threshold voltage set notch by a doping combination of at least the screening layer and the threshold voltage tuning layer;
a first channel layer on the threshold voltage tuning layer of the device of the first type;
a second channel layer on a doped well of a device of a second type;
a plurality of gate stacks, each gate stack on a corresponding first channel layer or a second channel layer, with at least some gate stacks on the first channel layer having a first work function and other gate stacks on the second channel layer having a second work function different from the first work function; and
wherein the first channel layer is substantially undoped, and wherein the threshold voltage tuning layer comprises dopants such that a vertical dopant profile is created by the first channel layer, the threshold voltage tuning layer, and the screening layer, and the threshold voltage set notch has a shallow notch configuration.
2. The integrated circuit die of claim 1 , wherein the threshold voltage tuning layer and the screening layer are doped to form the threshold voltage set notch with a shallow notch.
3. The integrated circuit die of claim 1 , wherein the first and second channel layers are substantially undoped.
4. The integrated circuit die of claim 1 , wherein the gate stacks comprise metal.
5. The integrated circuit die of claim 1 , further comprising:
a shallow well formed in at least one of the plurality of doped wells.
6. The integrated circuit die of claim 1 , further comprising:
a body tap coupled to at least one of the doped wells, the body tap operable to selectively apply a bias thereto to adjust the threshold voltage.
7. The integrated circuit die of claim 1 , further comprising:
a dopant migration resistant layer above and/or below the threshold voltage tuning region.
8. An integrated circuit die containing a device of a first type and a device of a second type,
the device of the first type comprising:
a first well;
a first screening layer on the first well;
a first threshold voltage tuning layer on the first screening layer to provide a first threshold voltage set notch by a doping combination of at least the first screening layer and the first threshold voltage tuning layer;
a first channel layer on the first threshold voltage tuning layer; and
a first gate stack having a first work function on the first channel layer;
the device of the second type comprising:
a second well;
a second channel layer on the second well; and
a second gate stack having a second work function different from the first work function on the second channel layer, wherein
the first channel layer is substantially undoped, and wherein
the first threshold voltage tuning layer comprises such dopants concentration that a vertical dopant profile formed by the first channel layer, the first threshold voltage tuning layer, and the first screening layer create the first threshold set notch with a shallow configuration.