IP Library Granted Patent US 9,581,644
Granted Patent B2
US 9,581,644 · App. 14/656,790 · Granted Feb 28, 2017

Digital IC simulation

Inventors: De Xian Li (Shanghai, CN); Yufei Li (Shanghai, CN); Dan Liu (Beijing, CN); Yang Liu (Shanghai, CN)
Assignee: GLOBALFOUNDRIES INC.
G01R31/3177G06F17/5022
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Quick Facts
Patent No.
US 9,581,644
App. No.
14/656,790
Granted
Feb 28, 2017
Kind
B2
Abstract

The present invention discloses a digital integrated circuit simulation method and simulator. The method comprises: obtaining a circuit diagram of the digital integrated circuit and a checkpoint in the circuit diagram; determining a point relevant to a boundary between a two-value simulation and a multi-value simulation in the circuit diagram and a state of the relevant point according to the checkpoint; determining a boundary position, as well as a boundary type of the boundary position, of the boundary between the two-value simulation and the multi-value simulation in the circuit diagram according to the relevant point and the state of the relevant point; inserting a conversion circuit at the boundary position according to the boundary type of the boundary position; and modeling and simulating the circuit diagram into which the conversion circuit is inserted. The method and simulator can reduce simulation time and the needed storage resources.

Claims (57)

1. A digital integrated circuit simulation method, comprising:

obtaining, by a computing device, a circuit diagram of the digital integrated circuit, as described in a computing language, and a checkpoint in the circuit diagram;

determining, by the computing device, a point relevant to a boundary between a two-value simulation and a multi-value simulation in the circuit diagram and a state of the relevant point according to the checkpoint, the two-value simulation being representative of a one logical bit with only binary value 0 and 1 and the multi-value simulation being representative of a one logic bit by multiple values;

determining, by the computing device, a boundary position, as well as a boundary type of the boundary position, of the boundary between the two-value simulation and the multi-value simulation in the circuit diagram according to the relevant point and the state of the relevant point;

inserting, by the computing device, a conversion circuit at the boundary position according to the boundary type of the boundary position; and

modeling and simulating, by the computing device, the circuit diagram into which the conversion circuit is inserted.

2. The method according to claim 1 , wherein the state of the relevant point is one of:

two-value;

multi-value.

3. The method according to claim 1 , wherein the point relevant to the boundary between the two-value simulation and the multi-value simulation is at least one of the following devices in the circuit diagram:

a combined logic gate;

a flip-flop.

4. The method according to claim 3 , wherein the point relevant to the boundary between the two-value simulation and the multi-value simulation comprises an input point and its one upper level source point in the circuit diagram, and the determining a point relevant to a boundary between a two-value simulation and a multi-value simulation in the circuit diagram and a state of the relevant point according to the checkpoint comprises:

determining an input point and its one upper level source point in the circuit diagram; and

marking a state of the input point and a state of the one upper level source point according to the checkpoint.

5. The method according to claim 4 , wherein the determining a boundary position of the boundary between the two-value simulation and the multi-value simulation in the circuit diagram according to the relevant point and the state of the relevant point comprises:

judging whether the state of the input point is the same as the state of the one upper level source point; and

in response to the state of the input point differing from the state of the one upper level source point, determining a boundary position as between the one upper level source point and the input point.

6. The method according to claim 5 , wherein the determining an input point and its one upper level source point in the circuit diagram comprises one of the following methods:

tracing from the output end to the input end of the circuit diagram, wherein a traced first-level point is the input point and a second-level point is the one upper level source point;

tracing from the input end to the output end of the circuit diagram, wherein a traced first-level point is the one upper level source point and a second-level point is the input point.

7. The method according to claim 5 , wherein the determining a boundary type of the boundary position comprises:

in response to the state of the input point being multi-value and the state of the one upper level source point being two-value at the boundary position, determining the boundary type of the boundary position as two-value-to-multi-value, T-to-M;

in response to the state of the input point being two-value and the state of the one upper level source point being multi-value at the boundary position, determining the boundary type of the boundary position as multi-value-to-two-value, M-to-T.

8. The method according to claim 7 , wherein the inserting a conversion circuit at the boundary position according to the boundary type of the boundary position comprises:

in response to the boundary type of the boundary position being T-to-M, inserting a first conversion circuit at the output end of the one upper level source point of the boundary position, wherein the first conversion circuit is a conversion circuit generating a corresponding multi-value signal according to a two-value signal outputted by the one upper level source point;

in response to the boundary type of the boundary position being M-to-T, inserting a second conversion circuit at the input end of the input point of the boundary position, wherein the second conversion circuit is a conversion circuit generating a corresponding two-value signal according to a multi-value signal of the input of the input point.

9. The method according to claim 8 , wherein in response to the boundary type of the boundary position being M-to-T, an X detection is further required at the second conversion circuit, wherein the X detection is for monitoring whether an X exists at the input end of an input point of the second conversion circuit; and if an X exists, the boundary position is determined to be expanded.

10. The method according to claim 9 , further comprising: in response to the boundary position is determined to be expanded, re-determining a boundary position, as well as a boundary type of the boundary position, of a boundary between the two-value simulation and the multi-value simulation in the circuit diagram.

11. A digital integrated circuit simulator which is implemented in a computing device, comprising:

an obtaining module configured to obtain a circuit diagram of the digital integrated circuit, as described in a computing language, and a checkpoint in the circuit diagram;

a point and state determining module configured to determine a point relevant to a boundary between a two-value simulation and a multi-value simulation in the circuit diagram and a state of the relevant point according to the checkpoint, the two-value simulation being representative of a one logical bit with only binary value 0 and 1 and the multi-value simulation being representative of a one logic bit by multiple values;

a boundary and type determining module configured to determine a boundary position, as well as a boundary type of the boundary position, of the boundary between the two-value simulation and the multi-value simulation in the circuit diagram according to the relevant point and the state of the relevant point;

an inserting module configured to insert a conversion circuit at the boundary position according to the boundary type of the boundary position; and

a modeling and simulating module configured to model and simulate the circuit diagram into which the conversion circuit is inserted.

12. The simulator according to claim 11 , wherein the state of the relevant point is one of:

two-value;

multi-value.

13. The simulator according to claim 11 , wherein the point relevant to the boundary between the two-value simulation and the multi-value simulation is at least one of the following devices in the circuit diagram:

a combined logic gate;

a flip-flop.

14. The simulator according to claim 13 , wherein the point relevant to the boundary between the two-value simulation and the multi-value simulation comprises an input point and its one upper level source point in the circuit diagram, and the point and state determining module comprises:

a point determining module configured to determine an input point and its one upper level source point in the circuit diagram; and

a state determining module configured to mark a state of the input point and a state of the one upper level source point according to the checkpoint.

15. The simulator according to claim 14 , wherein the boundary and type determining module comprises:

a judging module configured to judge whether the state of the input point is the same as the state of the one upper level source point; and

a boundary determining module configured to, in response to the state of the input point differing from the state of the one upper level source point, determine a boundary position as between the one upper level source point and the input point.

16. The simulator according to claim 15 , wherein the point determining module uses one of the following methods:

tracing from the output end to the input end of the circuit diagram, wherein a traced first-level point is the input point and a second-level point is the one upper level source point;

tracing from the input end to the output end of the circuit diagram, wherein a traced first-level point is the one upper level source point and a second-level point is the input point.

17. The simulator according to claim 15 , wherein the boundary and type determining module comprises:

a type determining module configured to, in response to the state of the input point being multi-value and the state of the one upper level source point being two-value at the boundary position, determine the boundary type of the boundary position as two-value-to-multi-value, T-to-M; and in response to the state of the input point being two-value and the state of the one upper level source point being multi-value at the boundary position, determine the boundary type of the boundary position as multi-value-to-two-value, M-to-T.

18. The simulator according to claim 17 , wherein the inserting module comprises:

a first inserting module configured to, in response to the boundary type of the boundary position being T-to-M, insert a first conversion circuit at the output end of the one upper level source point of the boundary position, wherein the first conversion circuit is a conversion circuit generating a corresponding multi-value signal according to a two-value signal outputted by the one upper level source point;

a second inserting module configured to, in response to the boundary type of the boundary position being M-to-T, insert a second conversion circuit at the input end of the input point of the boundary position, wherein the second conversion circuit is a conversion circuit generating a corresponding two-value signal according to a multi-value signal of the input of the input point.

19. The simulator according to claim 18 , wherein in response to the boundary type of the boundary position being M-to-T, the second conversion circuit further comprises an X detection circuit, wherein the X detection circuit is for monitoring whether an X exists at the input end of an input point of the second conversion circuit, and if an X exists, the boundary position is determined to be expanded.

20. The simulator according to claim 19 , further comprising: a boundary expansion handling module configured to, in response to the boundary position is determined to be expanded, re-determine a boundary position, as well as a boundary type of the boundary position, of a boundary between the two-value simulation and the multi-value simulation in the circuit diagram.

Assignments (6)
RELEASE OF SECURITY INTEREST Recorded May 12, 2021
From: WILMINGTON TRUST, NATIONAL ASSOCIATION
To: GLOBALFOUNDRIES U.S. INC.
Reel/Frame 056987/0001 →
RELEASE OF SECURITY INTEREST Recorded Nov 20, 2020
From: WILMINGTON TRUST, NATIONAL ASSOCIATION
To: GLOBALFOUNDRIES INC.
Reel/Frame 054636/0001 →
SECURITY AGREEMENT Recorded Nov 29, 2018
From: GLOBALFOUNDRIES INC.
To: WILMINGTON TRUST, NATIONAL ASSOCIATION
Reel/Frame 049490/0001 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Oct 5, 2015
From: GLOBALFOUNDRIES U.S. 2 LLC; GLOBALFOUNDRIES U.S. INC.
To: GLOBALFOUNDRIES INC.
Reel/Frame 036779/0001 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Sep 3, 2015
From: INTERNATIONAL BUSINESS MACHINES CORPORATION
To: GLOBALFOUNDRIES U.S. 2 LLC
Reel/Frame 036550/0001 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Mar 13, 2015
From: LI, DE XIAN; LI, YUFEI; LIU, DAN; LIU, YANG
To: INTERNATIONAL BUSINESS MACHINES CORPORATION
Reel/Frame 035159/0222 →
Priority Claims (1)
CN 2014 1 0127820 · Mar 31, 2014 · national
Continuity (1)
Related Publication 20150276872A1 · Oct 1, 2015