IP Library › Granted Patent US 10,008,494
Granted Patent B2
US 10,008,494 · App. 15/404,053 · Granted Jun 26, 2018

Semiconductor component and method for fabricating the same

Inventors: Cheng-Chieh Lai (New Taipei, TW); Kuang-Hsin Chen (Taoyuan, TW); Shih-Kai Fan (Hsinchu, TW); Yung-Hsien Wu (Hsinchu, TW); Yu-Hsun Chen (Hsinchu, TW)
Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
H01L27/0886H01L21/28079H01L21/28088H01L21/823431H01L21/823437H01L21/823462H01L29/495H01L29/4966H01L29/513H01L29/517H01L29/66545
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Quick Facts
Patent No.
US 10,008,494
App. No.
15/404,053
Granted
Jun 26, 2018
Kind
B2
Abstract

A semiconductor component, which includes a substrate, an interfacial layer disposed on the substrate, a first metal gate structure and a second metal gate structure disposed on the substrate. The first metal gate structure includes a first high-k dielectric layer disposed on the interfacial layer, and a first metal gate layer disposed on the first high-k dielectric layer. The second metal gate structure includes a second high-k dielectric layer disposed on the interfacial layer, a third high-k dielectric layer disposed on the second high-k dielectric layer, and a second metal gate layer disposed on the third high-k dielectric layer.

Claims (47)

1. A semiconductor component, comprising:

a substrate;

a first metal gate structure disposed on the substrate, comprising:

a first high-k dielectric layer disposed on the substrate; and

a first metal gate layer disposed on the first high-k dielectric layer; and

a second metal gate structure disposed on the substrate, comprising:

a second high-k dielectric layer disposed on the substrate;

a third high-k dielectric layer disposed on and in contact with the second high-k dielectric layer, wherein the second high-k dielectric layer is between the third high-k dielectric layer and the substrate, and a dielectric constant of the first high-k dielectric layer is different from a dielectric constant of the third high-k dielectric layer; and

a second metal gate layer disposed on the third high-k dielectric layer.

2. The semiconductor component of claim 1 , wherein a dielectric constant of the second high-k dielectric layer is greater or less than that of the third high-k dielectric layer.

3. The semiconductor component of claim 1 , wherein the first high-k dielectric layer and the second high-k dielectric layer are made of same material.

4. The semiconductor component of claim 1 , further comprising a first work function metal layer disposed on the first high-k dielectric layer.

5. The semiconductor component of claim 4 , further comprising a barrier layer disposed between the first high-k dielectric layer and the first work function metal layer.

6. The semiconductor component of claim 1 , further comprising a second work function metal layer disposed on the third high-k dielectric layer.

7. The semiconductor component of claim 6 , further comprising a barrier layer disposed between the third high-k dielectric layer and the second work function metal layer.

8. The semiconductor component of claim 1 , further comprising a pair of spacers disposed in contact with side surfaces of the first metal gate structure.

9. The semiconductor component of claim 1 , further comprising a pair of spacers disposed in contact with side surfaces of the second metal gate structure.

10. A semiconductor component, comprising:

a first device comprising:

a first source;

a first drain; and

a first metal gate structure disposed between the first source and the first drain, the first metal gate structure comprising:

an interfacial layer;

a first high-k dielectric layer in contact with the interfacial layer;

a first barrier layer in contact with the first high-k dielectric layer; and

a first metal gate layer disposed on the first barrier layer; and

a second device comprising:

a second source;

a second drain; and

a second metal gate structure disposed between the second source and the second drain, the second metal gate structure comprising:

a second high-k dielectric layer;

a third high-k dielectric layer disposed on the second high-k dielectric layer, wherein a dielectric constant of the first high-k dielectric layer is different from a dielectric constant of the third high-k dielectric layer;

a second barrier layer in contact with the third high-k dielectric layer; and

a second metal gate layer disposed on the second barrier layer.

11. The semiconductor component of claim 10 , wherein a threshold voltage of the first device is different from that of the second device.

12. The semiconductor component of claim 10 , wherein the first device and the second device are FinFET devices.

13. The semiconductor component of claim 10 , wherein a material of the first high-k dielectric layer is the same as that of the second high-k dielectric layer.

14. The semiconductor component of claim 10 , wherein a material of the first high-k dielectric layer is different from that of the third high-k dielectric layer.

15. A method for fabricating a semiconductor component, comprising:

forming a first high-k dielectric layer on a substrate;

forming a second high-k dielectric layer directly on a first part of the first high-k dielectric layer such that a second part of the first high-k dielectric layer is entirely uncovered by the second high-k dielectric layer, wherein the first part of the first high-k dielectric layer is between the second high-k dielectric layer and the substrate; and

forming a metal gate layer on the second high-k dielectric layer and on the second part of the first high-k dielectric layer.

16. The method of claim 15 , wherein a dielectric constant of the first high-k dielectric layer is greater than that of the second high-k dielectric layer.

17. The method of claim 15 , wherein a dielectric constant of the first high-k dielectric layer is less than that of the second high-k dielectric layer.

18. The method of claim 15 , wherein the first high-k dielectric layer and the second high-k dielectric layer are made of different materials.

19. The method of claim 15 , further comprising forming a first work function metal layer on the second part of the first high-k dielectric layer before forming the metal gate layer.

20. The method of claim 15 , further comprising forming a second work function metal layer on the second high-k dielectric layer before forming the metal gate layer.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jan 12, 2017
From: LAI, CHENG-CHIEH; CHEN, KUANG-HSIN; FAN, SHIH-KAI; WU, YUNG-HSIEN; CHEN, YU-HSUN
To: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
Reel/Frame 040966/0271 →
Continuity (2)
Continuation 14724538 · May 28, 2015
Related Publication 20170125417A1 · May 4, 2017
Cited By (1)
US 12,733,199