Gate resistance reduction through low-resistivity conductive layer
A device includes a semiconductor fin, and a gate stack on sidewalls and a top surface of the semiconductor fin. The gate stack includes a high-k dielectric layer, a work-function layer overlapping a bottom portion of the high-k dielectric layer, and a blocking layer overlapping a second bottom portion of the work-function layer. A low-resistance metal layer overlaps and contacts the work-function layer and the blocking layer. The low-resistance metal layer has a resistivity value lower than second resistivity values of both of the work-function layer and the blocking layer. A gate spacer contacts a sidewall of the gate stack.
1 . A structure comprising:
a first gate stack comprising:
a first high-k dielectric layer;
a first work-function layer overlapping a bottom portion of the first high-k dielectric layer;
a first blocking layer overlapping a bottom portion of the first work-function layer; and
a first metal layer overlapping and contacting the first work-function layer and the first blocking layer, wherein the first blocking layer and the first metal layer form an interface, and the interface extends from a vertical center line of the first gate stack in opposing lateral directions; and
a second gate stack comprising:
a second high-k dielectric layer;
a second work-function layer overlapping a bottom portion of the second high-k dielectric layer;
a second blocking layer overlapping a bottom portion of the second work-function layer, wherein the first blocking layer and the second blocking layer comprise a same metal compound;
a metal filling layer over the second blocking layer; and
a second metal layer overlapping and contacting the second work-function layer and the second blocking layer, wherein the metal filling layer and the second metal layer comprise different materials.
2 . The structure of claim 1 further comprising a dielectric filling region over and contacting the first metal layer and the first high-k dielectric layer.
3 . The structure of claim 2 further comprising a gate spacer contacting a sidewall of the first high-k dielectric layer, wherein the dielectric filling region comprises a high portion overlapping the gate spacer.
4 . The structure of claim 3 further comprising a contact etch stop layer contacting the gate spacer, wherein the contact etch stop layer comprises a part higher than a top edge of the gate spacer.
5 . The structure of claim 1 , wherein the first metal layer is lower than a top edge of the first high-k dielectric layer.
6 . The structure of claim 1 , wherein the second gate stack is wider than the first gate stack.
7 . The structure of claim 1 , wherein the first gate stack has a first total count of layers, and the second gate stack has a second total count of layers different from the first total count of layers.
8 . The structure of claim 1 , wherein in a cross-section of the structure, the metal filling layer has a rectangular cross-sectional shape.
9 . The structure of claim 1 , wherein the second metal layer comprises a top surface, wherein in a cross-sectional view of the structure, the top surface of the second metal layer continuously extends from a first sidewall of the second high-k dielectric layer to an opposing second sidewall of the second high-k dielectric layer.
10 . A structure comprising:
a first gate stack comprising:
a first gate dielectric; and
a first gate electrode comprising:
a first work-function layer over the first gate dielectric;
a first blocking layer comprising titanium nitride over and contacting the first work-function layer;
a first metal layer over and contacting the first work-function layer and the first blocking layer, wherein an entire top surface of the first blocking layer is in contact with the first metal layer; and
a second gate stack wider than the first gate stack, the second gate stack comprising:
a second gate dielectric; and
a second gate electrode comprising:
a second work-function layer over the second gate dielectric;
a second blocking layer comprising titanium nitride over and contacting the second work-function layer;
a filling-metal region over the first blocking layer; and
a second metal layer, wherein top surfaces of the second blocking layer are in physical contact with both of a first bottom surface of the filling-metal region and a second bottom surface of the second metal layer, wherein the filling-metal region and the second metal layer form a distinguishable interface in between.
11 . The structure of claim 10 , wherein the first gate electrode comprises fewer layers than the second gate electrode.
12 . The structure of claim 10 , wherein the first metal layer and the second metal layer comprise a same metal as the filling-metal region.
13 . The structure of claim 10 , wherein the first metal layer is lower than a top end of the first gate dielectric.
14 . The structure of claim 10 further comprising a gate spacer contacting the first gate stack, wherein the first metal layer is lower than a top end of the gate spacer.
15 . The structure of claim 14 further comprising:
a source/drain region on a side of the first gate dielectric; and
a contact etch stop layer comprising a first portion over and contacting the source/drain region, and a second portion contacting the gate spacer.
16 . The structure of claim 10 , wherein the second metal layer comprises a top surface, wherein in a cross-sectional view of the structure, the top surface of the second metal layer continuously extends from a first sidewall of the second gate dielectric to an opposing second sidewall of the second gate dielectric.
17 . A structure comprising:
a gate spacer;
a gate stack comprising:
a gate dielectric;
a plurality of conductive layers on the gate dielectric, wherein the plurality of conductive layers comprise a lower layer and a topmost layer over the lower layer, and the topmost layer has a lower resistivity than the lower layer;
a metal layer over and contacting top surfaces of the plurality of conductive layers, wherein a first sidewall of the metal layer contacts a second sidewall of the gate dielectric, and wherein the metal layer and the topmost layer comprise different materials;
a dielectric filling region comprising:
a first portion over and contacting the gate spacer, wherein a part of the first portion is lower than a first top end of the gate spacer; and
a second portion over and contacting the metal layer; and
a source/drain region aside the gate spacer.
18 . The structure of claim 17 further comprising a contact etch stop layer comprising:
a first part overlapping the source/drain region; and
a second part contacting the gate spacer, wherein the second part comprises a second top end higher than the first top end of the gate spacer.
19 . The structure of claim 17 , wherein the metal layer and the topmost layer comprise a same metal.
20 . The structure of claim 17 , wherein the metal layer comprises a top surface, wherein in a cross-sectional view of the structure, the top surface of the metal layer continuously extends from a first sidewall of the gate dielectric to an opposing second sidewall of the gate dielectric.