IP Library Granted Patent US 10,043,897
Granted Patent B2
US 10,043,897 · App. 14/742,165 · Granted Aug 7, 2018

Semiconductor device and method of fabricating semiconductor device

Inventor: Shirou Ozaki (Kawasaki, JP)
Assignee: FUJITSU LIMITED
H01L29/7787H01L21/28264H01L29/2003H01L29/205H01L29/401H01L29/513H01L29/517H01L29/518H01L29/66431H01L29/66462H01L29/7786H01L24/29H01L24/32H01L24/45H01L24/48H01L24/49H01L24/73H01L29/4236H01L2224/0603H01L2224/29101H01L2224/32245H01L2224/45124H01L2224/48247H01L2224/48257H01L2224/4903H01L2224/73265H01L2924/1033H01L2924/13064H01L2924/181
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Quick Facts
Patent No.
US 10,043,897
App. No.
14/742,165
Granted
Aug 7, 2018
Kind
B2
Abstract

A method of fabricating a semiconductor device may form a nitride semiconductor layer on a substrate, form a first insulator layer on the nitride semiconductor layer by steam oxidation of ALD, form a second insulator layer on the first insulator layer by oxygen plasma oxidation of ALD, form a gate electrode on the second insulator layer, and form a source and drain electrodes on the nitride semiconductor layer. The nitride semiconductor layer may include a first semiconductor layer on the substrate, and a second semiconductor layer on the first semiconductor layer.

Claims (20)

1. A semiconductor device comprising:

a nitride semiconductor layer formed on a substrate;

an insulator layer formed on the nitride semiconductor layer;

a gate electrode formed on the insulator layer; and

a source electrode and a drain electrode formed on the nitride semiconductor layer,

wherein the nitride semiconductor layer includes a first semiconductor layer formed on the substrate, and a second semiconductor layer formed on the first semiconductor layer,

wherein the insulator layer includes a first insulator layer made of aluminum oxide and formed on the second semiconductor layer, and a second insulator layer made of aluminum oxide and formed on the first insulator layer,

wherein a ratio of oxygen atoms with respect to metal atoms included in the nitride semiconductor layer, in a vicinity of an interface between the second semiconductor layer and the first insulator layer, is 0.4 or lower, and

wherein a density of aluminum hydroxide included each of the first and second insulator layers of the insulator layer is 4% or lower.

2. The semiconductor device as claimed in claim 1 , wherein the first insulator layer has a thickness in a range of 5 nm to 10 nm, and the second insulator layer has a thickness in a range of 10 nm to 100 nm.

3. The semiconductor device as claimed in claim 1 , wherein the nitride semiconductor layer further includes a third semiconductor layer formed on the second semiconductor layer.

4. The semiconductor device as claimed in claim 3 , wherein the third semiconductor layer is made of a material including GaN.

5. The semiconductor device as claimed in claim 4 , wherein the first semiconductor layer is made of a material including GaN.

6. The semiconductor device as claimed in claim 5 , wherein the second semiconductor layer is made of a material including AlGaN.

7. The semiconductor device as claimed in claim 1 , further comprising:

a HEMT (High Electron Mobility Transistor).

8. A power supply unit comprising:

the semiconductor device as claimed in claim 1 .

9. An amplifier comprising:

the semiconductor device as claimed in claim 1 .

Priority Claims (1)
JP 2012-061259 · Mar 16, 2012 · national
Continuity (2)
Division 13721257 · Dec 20, 2012
Related Publication 20150311333A1 · Oct 29, 2015
Cited By (2)
US 12,437,985 US 12,727,185