IP Library › Granted Patent US 10,090,209
Granted Patent B2
US 10,090,209 · App. 15/615,072 · Granted Oct 2, 2018

Methods of predicting unity gain frequency with direct current and/or low frequency parameters

Inventors: Amit A. Dikshit (Bangalore, IN); Tamilmani Ethirajan (Bangalore, IN); Shrinivas J. Pandharpure (Bangalore, IN); Vaidyanathan T. Subramanian (Bangalore, IN); Josef S. Watts (South Burlington, VT)
Assignee: GLOBALFOUNDRIES INC.
H01L22/14G01R31/2621G06F17/5036G06F17/5063G01R31/2625
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Quick Facts
Patent No.
US 10,090,209
App. No.
15/615,072
Granted
Oct 2, 2018
Kind
B2
Abstract

Various embodiments include approaches for predicting unity gain frequency in a MOSFET. In some cases, a method includes predicting a unity gain frequency (f T ) in a MOSFET device in a manufacturing line, the method including: measuring a first set of in-line direct current (DC) parameters of the MOSFET on the manufacturing line at a first drain voltage (V d1 ); extracting a transconductance (G m ) from the first set of in-line DC parameters as a function of a gate-voltage (V g ) and the first drain-voltage (V d1 ); measuring a second set of in-line DC parameters of the MOSFET on the manufacturing line at a second drain voltage (V d2 ); extracting a total gate capacitance (C gg ) from the second set of in-line DC parameters as a function of the gate-voltage (V g ); and predicting the unity gain frequency (f T ) of the MOSFET based upon the extracted transconductance (G m ) and the extracted total gate capacitance (C gg ).

Claims (30)

1. A method of predicting a unity gain frequency (f T ) in a metal-oxide-semiconductor field-effect transistor (MOSFET) device in a manufacturing line, the method comprising:

measuring a first set of in-line direct current (DC) parameters of the MOSFET on the manufacturing line at a first drain voltage (V d1 );

extracting a transconductance (G m ) from the first set of in-line DC parameters as a function of a gate-voltage (V g ) and the first drain-voltage (V d1 );

measuring a second set of in-line DC parameters of the MOSFET on the manufacturing line at a second drain voltage (V d2 ), wherein the second drain voltage (V d2 ) is distinct from the first drain-voltage (V d1 );

extracting a total gate capacitance (C gg ) from the second set of in-line DC parameters as a function of the gate-voltage (V g ); and

predicting the unity gain frequency (f T ) of the MOSFET based upon the extracted transconductance (G m ) and the extracted total gate capacitance (C gg ),

wherein the unity gain frequency (f T ) is calculated according to the equation:

f

T

=

G

m

2

*

π

*

C

gg

.

2. The method of claim 1 , wherein the first set of in-line DC parameters includes a drain-current gate-voltage (I d V g ) characteristic.

3. The method of claim 1 , wherein the second set of in-line DC parameters includes a total gate capacitance gate-voltage (C gg V g ) characteristic.

4. The method of claim 1 , wherein the second drain voltage is equal to approximately zero.

5. The method of claim 1 , wherein the MOSFET includes a multi-finger MOSFET having a channel width larger than a channel length, with a perimeter defined along a drain.

6. A method of predicting a unity gain frequency (f T ) in a metal-oxide-semiconductor field-effect transistor (MOSFET) device in a manufacturing line, the method comprising:

measuring a first set of in-line direct current (DC) parameters of the MOSFET on the manufacturing line at a first drain voltage (V d1 );

extracting a transconductance (G m ) from the first set of in-line DC parameters as a function of a gate-voltage (V g ) and the first drain-voltage (V d1 );

measuring a second set of in-line DC parameters of the MOSFET on the manufacturing line at a second drain voltage (V d2 ), wherein the second drain voltage (V d2 ) is distinct from the first drain-voltage (V d1 );

extracting a total gate capacitance (C gg ) from the second set of in-line DC parameters as a function of the gate-voltage (V g ); and

predicting the unity gain frequency (f T ) of the MOSFET based upon the extracted transconductance (G m ) and the extracted total gate capacitance (C gg ).

7. The method of claim 6 , wherein the second drain voltage is equal to approximately zero.

Assignments (5)
RELEASE OF SECURITY INTEREST Recorded May 12, 2021
From: WILMINGTON TRUST, NATIONAL ASSOCIATION
To: GLOBALFOUNDRIES U.S. INC.
Reel/Frame 056987/0001 →
RELEASE OF SECURITY INTEREST Recorded Nov 20, 2020
From: WILMINGTON TRUST, NATIONAL ASSOCIATION
To: GLOBALFOUNDRIES INC.
Reel/Frame 054636/0001 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Nov 2, 2020
From: GLOBALFOUNDRIES INC.
To: GLOBALFOUNDRIES U.S. INC.
Reel/Frame 054633/0001 →
SECURITY AGREEMENT Recorded Nov 29, 2018
From: GLOBALFOUNDRIES INC.
To: WILMINGTON TRUST, NATIONAL ASSOCIATION
Reel/Frame 049490/0001 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jun 6, 2017
From: DIKSHIT, AMIT A.; ETHIRAJAN, TAMILMANI; PANDHARPURE, SHRINIVAS J.; SUBRAMANIAN, VAIDYANATHAN T.; WATTS, JOSEF S.
To: GLOBALFOUNDRIES INC.
Reel/Frame 042616/0528 →
Continuity (2)
Division 14146143 · Jan 2, 2014
Related Publication 20170271213A1 · Sep 21, 2017
Cited By (1)
US 12,223,246