Metal oxide layered structure and methods of forming the same
Some embodiment structures and methods are described. A structure includes an integrated circuit die at least laterally encapsulated by an encapsulant, and a redistribution structure on the integrated circuit die and encapsulant. The redistribution structure is electrically coupled to the integrated circuit die. The redistribution structure includes a first dielectric layer on at least the encapsulant, a metallization pattern on the first dielectric layer, a metal oxide layered structure on the metallization pattern, and a second dielectric layer on the first dielectric layer and the metallization pattern. The metal oxide layered structure includes a metal oxide layer having a ratio of metal atoms to oxygen atoms that is substantially 1:1, and a thickness of the metal oxide layered structure is at least 50 Å. The second dielectric layer is a photo-sensitive material. The metal oxide layered structure is disposed between the metallization pattern and the second dielectric layer.
1. A structure comprising:
an integrated circuit die at least laterally encapsulated by an encapsulant; and
a redistribution structure on the integrated circuit die and encapsulant, the redistribution structure being electrically coupled to the integrated circuit die, the redistribution structure comprising:
a first dielectric layer on at least the encapsulant,
a metallization pattern on the first dielectric layer,
a metal oxide layered structure on the metallization pattern, the metal oxide layered structure comprising a metal oxide layer having a ratio of metal atoms to oxygen atoms that is substantially 1:1, a thickness of the metal oxide layered structure being at least 50 Å, and
a second dielectric layer on the first dielectric layer and the metallization pattern, the second dielectric layer being a photo-sensitive material, the metal oxide layered structure being disposed between the metallization pattern and the second dielectric layer.
2. The structure of claim 1 , wherein the metal oxide layered structure consists essentially of the metal oxide layer, the metal oxide layer directly adjoining the metallization pattern.
3. The structure of claim 1 , wherein the metal oxide layered structure further comprises a native oxide layer, the native oxide layer directly adjoining the metallization pattern, the metal oxide layer directly adjoining the native oxide layer.
4. The structure of claim 1 , wherein the metal oxide layered structure further comprises a native oxide layer, the metal oxide layer directly adjoining the metallization pattern, the native oxide layer directly adjoining the metal oxide layer.
5. The structure of claim 1 , wherein the thickness is not more than 200 Å.
6. The structure of claim 1 , wherein the thickness is not more than 100 Å.
7. The structure of claim 1 , wherein a thickness of the metal oxide layer is in a range from 50 Å to 200 Å.
8. The structure of claim 1 , wherein a thickness of the metal oxide layer is in a range from 50 Å to 100 Å.
9. A structure comprising:
an integrated circuit die;
an encapsulant at least laterally encapsulating the integrated circuit die;
a first dielectric layer on the encapsulant and an active side of the integrated circuit die;
a metallization pattern on the first dielectric layer, the metallization pattern being electrically coupled to the active side of the integrated circuit die;
an adhesion layer on the metallization pattern, the adhesion layer comprising a metal oxide layer having a ratio of metal atoms to oxygen atoms that is substantially 1:1, a thickness of the adhesion layer being at least 50 Å; and
a second dielectric layer on the first dielectric layer and the adhesion layer, the second dielectric layer being a photo-sensitive material.
10. The structure of claim 9 , wherein the metal oxide layer directly adjoins the metallization pattern.
11. The structure of claim 9 , wherein the adhesion layer further comprises a native oxide layer, the native oxide layer directly adjoining the metallization pattern, the metal oxide layer directly adjoining the native oxide layer.
12. The structure of claim 9 , wherein the thickness is not more than 200 Å.
13. The structure of claim 9 , wherein the thickness is not more than 100 Å.
14. The structure of claim 9 , wherein a thickness of the metal oxide layer is in a range from 50 Å to 200 Å.
15. The structure of claim 9 , wherein a thickness of the metal oxide layer is in a range from 50 Å to 100 Å.
16. A structure comprising:
an encapsulant;
a semiconductor die within the encapsulant;
a through via extending from a first side of the encapsulant to a second side of the encapsulant opposite the first side;
a first redistribution layer adjacent to the first side and in electrical connection with the through via, the first redistribution layer comprising a first metal oxide layer with a first thickness of at least 50 {acute over (Å)}, the first metal oxide layer comprising a first metal oxide with a first ratio of first metal atoms to oxygen atoms that is substantially 1:1; and
a second redistribution layer adjacent to the second side and in electrical connection with the through via, the second redistribution layer comprising a second metal oxide layer with a second thickness of at least 50 {acute over (Å)}, the second metal oxide layer comprising a second metal oxide with a second ratio of second metal atoms to oxygen atoms that is substantially 1:1.
17. The structure of claim 16 , further comprising a package in electrical connection with the through via through the first redistribution layer.
18. The structure of claim 17 , wherein the package is a memory package.
19. The structure of claim 16 , wherein the first thickness is no greater than 100 {acute over (Å)}.
20. The structure of claim 16 , wherein the first thickness is no greater than 200 {acute over (Å)}.