Semiconductor device
As a display device has a higher definition, the number of pixels, gate lines, and signal lines are increased. When the number of the gate lines and the signal lines are increased, a problem of higher manufacturing cost, because it is difficult to mount an IC chip including a driver circuit for driving of the gate and signal lines by bonding or the like. A pixel portion and a driver circuit for driving the pixel portion are provided over the same substrate, and at least part of the driver circuit includes a thin film transistor using an oxide semiconductor interposed between gate electrodes provided above and below the oxide semiconductor. Therefore, when the pixel portion and the driver portion are provided over the same substrate, manufacturing cost can be reduced.
1. A semiconductor device comprising:
a circuit comprising:
a first transistor;
a second transistor;
a third transistor; and
a fourth transistor,
wherein one of a source electrode and a drain electrode of the first transistor is electrically connected to an output terminal of the circuit,
wherein a first conductive layer serving as a gate electrode of the first transistor is electrically connected to a third conductive layer serving as a gate electrode of the second transistor via a second conductive layer serving as one of a source electrode and a drain electrode of the third transistor and one of a source electrode and a drain electrode of the fourth transistor,
wherein one of a source electrode and a drain electrode of the second transistor is electrically connected to a gate electrode of the third transistor,
wherein the other of the source electrode and the drain electrode of the second transistor is electrically connected to a second wiring,
wherein the other of the source electrode and the drain electrode of the third transistor is electrically connected to the second wiring,
wherein the other of the source electrode and the drain electrode of the fourth transistor is electrically connected to the second wiring, and
wherein the second transistor comprises a channel formation region overlapping the third conductive layer.
2. The semiconductor device according to claim 1 , wherein an electrical continuity between the first conductive layer and the third conductive layer is constantly established.
3. A semiconductor device comprising:
a circuit comprising:
a first transistor;
a second transistor;
a third transistor; and
a fourth transistor,
wherein one of a source electrode and a drain electrode of the first transistor is electrically connected to an output terminal of the circuit,
wherein a first conductive layer serving as a gate electrode of the first transistor is electrically connected to a third conductive layer serving as a gate electrode of the second transistor via a second conductive layer serving as one of a source electrode and a drain electrode of the third transistor and one of a source electrode and a drain electrode of the fourth transistor,
wherein the first conductive layer is electrically connected to the third conductive layer not via a semiconductor layer,
wherein one of a source electrode and a drain electrode of the second transistor is electrically connected to a gate electrode of the third transistor,
wherein the other of the source electrode and the drain electrode of the second transistor is electrically connected to a second wiring,
wherein the other of the source electrode and the drain electrode of the third transistor is electrically connected to the second wiring,
wherein the other of the source electrode and the drain electrode of the fourth transistor is electrically connected to the second wiring, and
wherein the second transistor comprises a channel formation region overlapping the third conductive layer.
4. A display device comprising:
a pixel; and
a scan line driver circuit comprising a shift register circuit,
wherein the shift register circuit comprises a plurality of stages each comprising a circuit, the circuit comprising a first transistor, a second transistor, a third transistor, and a fourth transistor,
wherein one of a source electrode and a drain electrode of the first transistor is electrically connected to an output terminal of the circuit,
herein a first conductive layer serving as a gate electrode of the first transistor is electrically connected to a third conductive layer serving as a gate electrode of the second transistor via a second conductive layer serving as one of a source electrode and a drain electrode of the third transistor and one of a source electrode and a drain electrode of the fourth transistor,
wherein one of a source electrode and a drain electrode of the second transistor is electrically connected to a gate electrode of the third transistor,
wherein the other of the source electrode and the drain electrode of the second transistor is electrically connected to a second wiring,
wherein the other of the source electrode and the drain electrode of the third transistor is electrically connected to the second wiring,
wherein the other of the source electrode and the drain electrode of the fourth transistor is electrically connected to the second wiring,
wherein the second transistor comprises a channel formation region overlapping the third conductive layer, and
wherein the pixel is electrically connected to the output terminal.
5. The display device according to claim 4 , wherein an electrical continuity between the first conductive layer and the third conductive layer is constantly established.
6. A display device comprising:
a pixel; and
a scan line driver circuit comprising a shift register circuit,
wherein the shift register circuit comprises a plurality of stages each comprising a circuit, the circuit comprising a first transistor, a second transistor, a third transistor, and a fourth transistor,
wherein one of a source electrode and a drain electrode of the first transistor is electrically connected to an output terminal of the circuit,
wherein a first conductive layer serving as a gate electrode of the first transistor is electrically connected to a third conductive layer serving as a gate electrode of the second transistor via a second conductive layer serving as one of a source electrode and a drain electrode of the third transistor and one of a source electrode and a drain electrode of the fourth transistor,
wherein the first conductive layer is electrically connected to the third conductive layer not via a semiconductor layer,
wherein one of a source electrode and a drain electrode of the second transistor is electrically connected to a gate electrode of the third transistor,
wherein the other of the source electrode and the drain electrode of the second transistor is electrically connected to a second wiring,
wherein the other of the source electrode and the drain electrode of the third transistor is electrically connected to the second wiring,
wherein the other of the source electrode and the drain electrode of the fourth transistor is electrically connected to the second wiring,
wherein the second transistor comprises a channel formation region overlapping the third conductive layer, and
wherein the pixel is electrically connected to the output terminal.