Inter-level connection for multi-layer structures

1. A semiconductor device structure comprising:

a substrate;

a first device layer including a first semiconductor device having a first gate electrode disposed over a first channel region, a first conductive layer, and a first dielectric layer formed on the first conductive layer, the first device layer being formed on the substrate, and the first conductive layer being a laterally extending portion of the first gate electrode beyond the first channel region;

a second device layer including a second conductive layer, the second device layer being formed over the first device layer; and

a first inter-level connection structure including one or more conductive materials and connecting the first conductive layer to the second conductive layer, wherein:

the first inter-level connection structure penetrates at least part of the first dielectric layer, and lands on a portion of the first conductive layer other than a portion under which the first channel region exists,

a bottom surface of the first gate electrode laterally extends beyond the first channel region as a bottom surface of the first conductive layer,

the first gate electrode has a same width as the first conductive layer in plan view,

the second conductive layer is a second gate electrode disposed over a second channel region and a laterally extending portion laterally extending from the second gate electrode, and

the first inter-level connection structure connects the first conductive layer to a bottom surface of the laterally extending portion of the second conductive layer.

2. The semiconductor device of claim 1 , further comprising:

a third device layer disposed between the first device layer and the second device layer,

wherein the third device layer includes a third conductive layer.

3. The semiconductor device structure of claim 2 , wherein:

a first distance between the first inter-level connection structure and a first edge of the third conductive layer is equal to or smaller than a width of the first inter-level connection structure, and

a second distance between the first inter-level connection structure and a second edge of the first conductive layer is greater than the first distance.

4. The semiconductor device structure of claim 3 , wherein:

the third device layer include a second gate electrode disposed over a second channel region, and

the third conductive layer is a laterally extending portion of the second gate electrode beyond the second channel region.

5. A semiconductor device structure comprising:

a substrate;

a lower device layer including a first semiconductor device having a first source/drain electrode connected to a first source/drain region, a first conductive layer, and a first dielectric layer formed on the first conductive layer, the lower device layer being formed on the substrate, and the first conductive layer being a laterally extending portion of the first source/drain electrode beyond the first source/rain region;

an upper device layer including a second conductive layer, the upper device layer being formed over the lower device layer; and

a first inter-level connection structure including one or more conductive materials and connecting the first conductive layer to the second conductive layer, wherein:

the first inter-level connection structure penetrates at least part of the first dielectric layer, and lands on a portion of the first conductive layer other than a portion under which the first source/drain region exists,

a bottom surface of the first source/drain electrode is in direct contact with the first source/drain region and laterally extends beyond the first source/drain region as a bottom surface of the first conductive layer, and

the first source/drain electrode has a same width as the first conductive layer in plan view.

6. The semiconductor device of claim 5 , further comprising:

an intermediate device layer disposed between the lower device layer and the upper device layer,

wherein the intermediate device layer includes a third conductive layer.

7. The semiconductor device structure of claim 6 , wherein:

a first distance between the first inter-level connection structure and a first edge of the third conductive layer is equal to or smaller than a width of the first inter-level connection structure, and

a second distance between the first inter-level connection structure and a second edge of the first conductive layer is greater than the first distance.

8. The semiconductor device structure of claim 7 , wherein

the intermediate device layer include a second source/drain electrode connected to a second source/drain region, and

the third conductive layer is a laterally extending portion of the second source/drain electrode beyond the second source/drain region.

9. A semiconductor device structure comprising:

a substrate;

a lower device layer including a first semiconductor device having a first electrode disposed in direct contact with a first channel region or a first source/drain region, a first conductive layer, and a first dielectric layer formed on the first conductive layer, the lower device layer being formed on the substrate;

a MOS transistor having a channel different from the first channel region, a gate, a source and a drain and disposed in the lower device layer, the first conductive layer being electrically connected to the gate, or the source or the drain;

an upper device layer including a second conductive layer, the upper device layer being formed over the lower device layer;

a first inter-level connection structure including one or more conductive materials, wherein: and

the first inter-level connection vertically and straightly extends and directly connects the first conductive layer to the second conductive layer, and lands on a portion of the first conductive layer other than a portion under which the first channel region or the first source/drain region exists,

the first conductive layer is a laterally extending portion of the first electrode beyond the first channel region or a laterally extending portion of the first electrode beyond the first source/rain region, and

a bottom surface of the first conductive layer is located at a same level as a bottom surface of the first electrode.

10. The semiconductor device of claim 9 , further comprising:

an intermediate device layer disposed between the lower device layer and the upper device layer,

wherein the intermediate device layer includes a third conductive layer.

11. The semiconductor device structure of claim 10 , wherein:

a first distance between the first inter-level connection structure and a first edge of the third conductive layer is equal to or smaller than a width of the first inter-level connection structure, and

a second distance between the first inter-level connection structure and a second edge of the first conductive layer is greater than the first distance.

12. The semiconductor device structure of claim 11 , wherein

the intermediate device layer include a second electrode disposed over a second channel region and a second source/drain region, and

the third conductive layer is a laterally extending portion of the second electrode beyond the second channel region or a laterally extending portion of the second electrode beyond the second source/drain region.

13. The semiconductor device of claim 1 , wherein the first conductive layer and the first gate electrode are made of a same layer.

14. The semiconductor device of claim 5 , wherein the first conductive layer and the first source/drain electrode are made of a same layer.

15. The semiconductor device of claim 5 , wherein:

the second conductive layer is a second source/drain electrode disposed on a second source/drain region and a laterally extending portion laterally extending from the second source/drain electrode, and

the first inter-level connection structure connects the first conductive layer to a bottom surface of the laterally extending portion of the second source/drain electrode.

16. The semiconductor device of claim 5 , wherein the first source/drain electrode has a same thickness as the first conductive layer.