IP Library › Granted Patent US 10,170,497
Granted Patent B2
US 10,170,497 · App. 15/899,437 · Granted Jan 1, 2019

Method for manufacturing an electronic device and method for operating an electronic device

Inventors: Thoralf Kautzsch (Dresden, DE); Alessia Scire (Dresden, DE); Steffen Bieselt (Wehlen, DE); Franz Hirler (Isen, DE); Anton Mauder (Kolbermoor, DE); Wolfgang Scholz (Olching, DE); Hans-Joachim Schulze (Taufkirchen, DE); Francisco Javier Santos Rodriguez (Villach, AT)
H01L27/1207H01L21/761H01L21/764H01L21/76283H01L21/76895H01L21/823487H05K1/0284H05K1/183H05K3/30H01L29/7397H01L29/7813H05K1/0256H05K2201/10522Y10T29/4913
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Quick Facts
Patent No.
US 10,170,497
App. No.
15/899,437
Granted
Jan 1, 2019
Kind
B2
Abstract

According to various embodiments, an electronic device may include a carrier including at least a first region and a second region being laterally adjacent to each other; an electrically insulating structure arranged in the first region of the carrier, wherein the second region of the carrier is free of the electrically insulating structure; a first electronic component arranged in the first region of the carrier over the electrically insulating structure; a second electronic component arranged in the second region of the carrier; wherein the electrically insulating structure includes one or more hollow chambers, wherein the sidewalls of the one or more hollow chambers are covered with an electrically insulating material.

Claims (27)

1. A method for manufacturing an electronic device, the method comprising:

providing a carrier comprising a hollow chamber structure within the carrier;

forming a first trench structure extending from a surface of the carrier to the hollow chamber structure such that an electrically isolated region is formed over the hollow chamber structure; and

forming at least one second trench structure extending from the surface of the carrier into a second region of the carrier, the second region of the carrier being laterally adjacent to the electrically isolated region, the second trench structure being at least a part of an electronic component provided in the second region of the carrier.

2. The method of claim 1 ,

wherein the first trench structure and the at least one second trench structure are formed at the same time.

3. The method of claim 1 ,

wherein forming at least one first trench structure further comprises covering at least one sidewall of the first trench structure with an electrically insulating material.

4. The method of claim 3 ,

wherein the electrically insulating material comprises an oxide.

5. The method of claim 1 ,

wherein forming at least one second trench structure further comprises covering at least one sidewall of the second trench structure with an electrically insulating material.

6. The method of claim 5 ,

wherein the electrically insulating material comprises an oxide.

7. The method of claim 1 ,

wherein forming at least one first trench structure further comprises at least partially filling the at least one first trench structure with an electrically conductive material.

8. The method of claim 1 ,

wherein forming at least one second trench structure further comprises at least partially filling the least one second trench structure with an electrically conductive material.

9. The method of claim 1 , further comprising:

forming an additional electronic component in the electrically isolated region, the additional electronic component being separated from the electronic component provided in the second region of the carrier.

10. The method of claim 9 , further comprising:

forming a metallization structure over the carrier, the metallization structure electrically connecting the electronic component provided in the second region of the carrier with the additional electronic component provided in the electrically isolated region.

11. The method of claim 1 ,

wherein the carrier comprises an additional surface opposite the surface;

wherein the electronic component is configured to provide a current flow between the surface and the additional surface.

12. The method of claim 11 ,

wherein the electronic component comprises a vertical transistor configured to provide the current flow between the surface and the additional surface.

Continuity (3)
Division 15375277 · Dec 12, 2016
Division 14098591 · Dec 6, 2013
Related Publication 20180175069A1 · Jun 21, 2018
Cited By (1)
US 12,414,342