IP Library Granted Patent US 10,234,772
Granted Patent B2
US 10,234,772 · App. 15/829,809 · Granted Mar 19, 2019

Overlay error correction

Inventors: Mangesh Bangar (San Jose, CA); Bruce E. Adams (Portland, OR); Kelly E. Hollar (Sunnyvale, CA); Abhilash J. Mayur (Salinas, CA); Huixiong Dai (San Jose, CA); Jaujiun Chen (San Jose, CA)
Assignee: Applied Materials, Inc.
G03F7/70633
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Quick Facts
Patent No.
US 10,234,772
App. No.
15/829,809
Granted
Mar 19, 2019
Kind
B2
Abstract

A calibration curve for a wafer comprising a layer on a substrate is determined. The calibration curve represents a local parameter change as a function of a treatment parameter associated with a wafer exposure to a light. The local parameter of the wafer is measured. An overlay error is determined based on the local parameter of the wafer. A treatment map is computed based on the calibration curve to correct the overlay error for the wafer. The treatment map represents the treatment parameter as a function of a location on the wafer.

Claims (13)

1. A system to manufacture an electronic device, comprising:

a processing chamber;

a processor coupled to the processing chamber; and

a memory coupled to the processor, the processor having a first configuration to control determining a first calibration curve for a first wafer comprising a first layer on a substrate, the first calibration curve representing a local parameter change as a function of a first treatment parameter associated with a wafer exposure to a light, the processor having a second configuration to control measuring the local parameter of the first wafer, the processor having a third configuration to control determining a first overlay error based on the local parameter, and the processor having a fourth configuration to control computing a first treatment map based on the first calibration curve to correct the first overlay error for the first wafer.

2. The system of claim 1 , wherein the processor has a fifth configuration to control the first treatment parameter using the first treatment map to expose the first wafer to the light.

3. The system of claim 1 , wherein the processor has a fifth configuration to control measuring a response of the local parameter of a reference wafer to a plurality of treatment conditions associated with a plurality of treatment parameters, wherein the processor has a sixth configuration to control generating a plurality of calibration curves based on measuring, wherein the processor has a seventh configuration to control determining a process window for each of the calibration curves, and wherein the first calibration curve is selected from the plurality of calibration curves stored in a memory based at least on the process window.

4. The system of claim 1 , wherein the first treatment parameter comprises a power, a fluence, a pulse width, a beam shape, a beam size, a wavelength, an exposure repetition rate, an exposure time, a scan speed, a number of flashes, a zone temperature, an ambient condition, an exposure mode, an exposure sequence, an exposure pattern, or any combination thereof, and wherein the local parameter comprises a local stress curvature.

5. A system to manufacture an electronic device, comprising:

a processing chamber;

a processor coupled to the processing chamber; and

a memory coupled to the processor, the processor having a first configuration to control determining a first calibration curve for a first wafer comprising a first layer on a substrate, the first calibration curve representing a local parameter change as a function of a first treatment parameter associated with a wafer exposure to a light, the processor having a second configuration to control measuring the local parameter of the first wafer, the processor having a third configuration to control determining a first overlay error based on the local parameter, and the processor having a fourth configuration to control computing a first treatment map based on the first calibration curve to correct the first overlay error for the first wafer, wherein the processor has a fifth configuration to control the first treatment parameter using the first treatment map to expose the first wafer to the light, and wherein the processor has a sixth configuration to control measuring a response of the local parameter of a reference wafer to a plurality of treatment conditions associated with a plurality of treatment parameters.

6. The system of claim 5 , wherein the processor has a seventh configuration to control generating a plurality of calibration curves based on measuring, wherein the processor has an eighth configuration to control determining a process window for each of the calibration curves, and wherein the first calibration curve is selected from the plurality of calibration curves stored in a memory based at least on the process window.

7. The system of claim 5 , wherein the first treatment parameter comprises a power, a fluence, a pulse width, a beam shape, a beam size, a wavelength, an exposure repetition rate, an exposure time, a scan speed, a number of flashes, a zone temperature, an ambient condition, an exposure mode, an exposure sequence, an exposure pattern, or any combination thereof, and wherein the local parameter comprises a local stress curvature.

Continuity (2)
Division 14874353 · Oct 2, 2015
Related Publication 20180101103A1 · Apr 12, 2018
Cited By (5)
US 12,197,137 US 12,481,223 US 12,644,696 US 12,645,152 US 12,674,662