Granted Patent B2

US 12,645,152 · App. 17/589,630 · Granted Jun 2, 2026

Inventors: Franz Zach (Los Gatos, CA); Mark D. Smith (San Jose, CA); Roel Gronheid (Leuven, BE)

Assignee: KLA Corporation

G03F7/70516G03F7/70633H01L21/67092H01L21/67121H01L21/67288

Abstract

Claims (27)

1 . A wafer shape metrology system comprising:

a wafer shape metrology sub-system configured to perform one or more stress-free shape measurements on a first wafer, a second wafer, and a bonded device wafer, wherein the bonded device wafer comprises a post-bonding pair of the first wafer and the second wafer; and

a controller communicatively coupled to the wafer shape metrology sub-system, the controller including one or more processors configured to execute a set of program instructions stored in a memory, the set of program instructions configured to cause the one or more processors to:

receive the one or more stress-free shape measurements from the wafer shape sub-system;

determine overlay distortion between one or more features on the first wafer and one or more features on the second wafer based on the one or more stress-free shape measurements of the first wafer, the second wafer, and the bonded device wafer; and

convert the overlay distortion to a feedforward correction for one or more lithographic scanners.

2 . The system of claim 1 , wherein the first wafer is an active wafer including functioning logic circuitry and the second wafer is an electrically passive carrier wafer.

3 . The system of claim 1 , wherein the device wafer undergoes a thinning process.

4 . The system of claim 3 , wherein a set of through silicon vias (TSVs) are patterned and etched on the backside of the device wafer.

5 . The system of claim 4 , wherein the set of TSVs comprise one or more contacts configured to provide an electrical connection from a back side of the device wafer to the front side of the device wafer.

6 . The system of claim 1 , wherein the converting the overlay signature to a feedforward correction for one or more lithographic scanners comprises:

converting the overlay signature to a feedforward correction for one or more lithographic scanners to reduce overlay for one or more lithographic exposures in a TSV process.

7 . The system of claim 6 , wherein the converting the overlay signature to a feedforward correction for one or more lithographic scanners includes one or more scaled bonding adjustments.

8 . The system of claim 6 , wherein the wafer shape metrology sub-system is configured to perform one or more additional shape measurements on the device wafer following a grinding process and prior to the TSV process.

9 . A system comprising:

a controller configured to receive one or more stress-free shape measurements from a wafer shape metrology sub-system, wherein the controller includes one or more processors configured to execute a set of program instructions stored in a memory, wherein the set of program instructions are configured to cause the one or more processors to:

receive the one or more stress-free shape measurements from the wafer shape sub-system;

determine overlay distortion between one or more features on the first wafer and one or more features on the second wafer based on the one or more stress-free shape measurements of the first wafer, the second wafer, and the bonded device wafer; and

convert the overlay distortion to a feedforward correction for one or more lithographic scanners.

10 . The system of claim 9 , wherein the first wafer is an active wafer including functioning logic circuitry and the second wafer is an electrically passive carrier wafer.

11 . The system of claim 9 , wherein the device wafer undergoes a thinning process.

12 . The system of claim 11 , wherein a set of through silicon vias (TSVs) are patterned and etched on the backside of the device wafer.

13 . The system of claim 11 , wherein the set of TSVs comprise one or more contacts configured to provide an electrical connection from a back side of the device wafer to the front side of the device wafer.

14 . The system of claim 9 , wherein the converting the overlay signature to a feedforward correction for one or more lithographic scanners comprises:

converting the overlay signature to a feedforward correction for one or more lithographic scanners to reduce overlay for one or more lithographic exposures in a TSV process.

15 . The system of claim 14 , wherein the converting the overlay signature to a feedforward correction for one or more lithographic scanners includes one or more scaled bonding adjustments.

16 . The system of claim 14 , wherein the wafer shape metrology sub-system is configured to perform one or more additional shape measurements on the device wafer following a grinding process and prior to the TSV process.

Assignments (1)

Continuity (2)

References Cited (282)