IP Library Granted Patent US 12,197,137
Granted Patent B2
US 12,197,137 · App. 18/520,244 · Granted Jan 14, 2025

System and method for determining post bonding overlay

Inventors: Franz Zach (Los Gatos, CA); Mark D. Smith (San Jose, CA); Xiaomeng Shen (Milpitas, CA); Jason Saito (Milpitas, CA); David Owen (Milpitas, CA)
Assignee: KLA Corporation
G03F7/70633G01B9/02021G01B11/16G01B11/161G01B11/24G01B11/2441G01N21/9501H01L21/67288H01L22/12H01L22/20
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Quick Facts
Patent No.
US 12,197,137
App. No.
18/520,244
Granted
Jan 14, 2025
Kind
B2
Abstract

A wafer shape metrology system includes a wafer shape metrology sub-system configured to perform one or more stress-free shape measurements on a first wafer, a second wafer, and a post-bonding pair of the first and second wafers. The wafer shape metrology system includes a controller communicatively coupled to the wafer shape metrology sub-system. The controller is configured to receive stress-free shape measurements from the wafer shape sub-system; predict overlay between one or more features on the first wafer and the second wafer based on the stress-free shape measurements of the first wafer, the second wafer, and the post-bonding pair of the first wafer and the second wafer; and provide a feedback adjustment to one or more process tools based on the predicted overlay. Additionally, feedforward and feedback adjustments may be provided to one or more process tools.

Claims (48)

1. A wafer shape metrology system comprising:

a wafer shape metrology sub-system configured to perform one or more stress-free shape measurements on a first wafer and a second wafer; and

a controller communicatively coupled to the wafer shape metrology sub-system, the controller including one or more processors configured to execute a set of program instructions stored in a memory, the set of program instructions configured to cause the one or more processors to:

receive the one or more stress-free shape measurements for the first wafer and the second wafer from the wafer shape sub-system;

determine a first wafer shape distortion of the first wafer by comparing the first wafer shape to a first reference structure and determine a second wafer shape distortion of the second wafer by comparing the second wafer shape to a second reference structure;

predict overlay between one or more features on the first wafer and one or more features on the second wafer based on the one or more stress-free shape measurements of the first wafer and the second wafer, the first wafer shape distortion, and the second wafer shape distortion; and

provide a feedforward adjustment to one or more process tools based on the predicted overlay.

2. The wafer shape metrology system of claim 1 , wherein at least one of the first reference structure or the second reference structure comprises an idealized flat plate.

3. The system of claim 1 , wherein the providing one or more feedforward control to one or more process tools based on the predicted overlay comprises:

providing one or more feedforward control signals to a bonder based on the predicted overlay.

4. The system of claim 1 , wherein the wafer shape metrology sub-system comprises a first interferometer sub-system and a second interferometer sub-system.

5. The system of claim 1 , wherein the predicting overlay between one or more features on the first wafer and one or more features on the second wafer based on the one or more stress-free shape measurements of the first wafer and the second wafer, the first shape distortion, and the second wafer shape distortion comprises:

extracting one or more wafer shape parameters from the one or more stress-free shape measurements of the first wafer and the second wafer.

6. The system of claim 5 , further comprising:

inputting the extracted one or more wafer shape parameters of the first wafer and the second wafer and the first shape distortion and the second wafer shape distortion into a mechanical model to predict overlay between one or more features on the first wafer and one or more features on the second wafer.

7. The system of claim 5 , wherein the extracted one or more wafer shape parameters comprises at least one of local shape curvature (LSC) or in-plane distortion (IPD).

8. The system of claim 5 , further comprising:

inputting the extracted one or more wafer shape parameters of the first wafer and the second wafer and the first shape distortion and the second wafer shape distortion into a machine learning algorithm to predict overlay between one or more features on the first wafer and one or more features on the second wafer.

9. The system of claim 8 , furthering comprising:

training the machine learning algorithm.

10. The system of claim 9 , wherein the training the machine learning algorithm comprises:

training the machine learning algorithm with infrared overlay data.

11. A system comprising:

a controller configured to receive wafer shape measurements from a wafer shape metrology sub-system, the controller including one or more processors configured to execute a set of program instructions stored in a memory, the set of program instructions configured to cause the one or more processors to:

receive one or more stress-free shape measurements for a first wafer and a second wafer from the wafer shape sub-system;

determine a first wafer shape distortion of the first wafer by comparing the first wafer shape to a first reference structure and determine a second wafer shape distortion of the second wafer by comparing the second wafer shape to a second reference structure;

predict overlay between one or more features on the first wafer and one or more features on the second wafer based on the one or more stress-free shape measurements of the first wafer and the second wafer, the first wafer shape distortion, and the second wafer shape distortion; and

provide a feedforward adjustment to one or more process tools based on the predicted overlay.

12. The wafer shape metrology system of claim 11 , wherein at least one of the first reference structure or the second reference structure comprises an idealized flat plate.

13. The system of claim 11 , wherein the providing one or more feedforward control to one or more process tools based on the predicted overlay comprises:

providing one or more feedforward control signals to a bonder based on the predicted overlay.

14. The system of claim 11 , wherein the wafer shape metrology sub-system comprises a first interferometer sub-system and a second interferometer sub-system.

15. The system of claim 11 , wherein the predicting overlay between one or more features on the first wafer and one or more features on the second wafer based on the one or more stress-free shape measurements of the first wafer and the second wafer, the first shape distortion, and the second wafer shape distortion comprises:

extracting one or more wafer shape parameters from the one or more stress-free shape measurements of the first wafer and the second wafer.

16. The system of claim 15 , further comprising:

inputting the extracted one or more wafer shape parameters of the first wafer and the second wafer and the first shape distortion and the second wafer shape distortion into a mechanical model to predict overlay between one or more features on the first wafer and one or more features on the second wafer.

17. The system of claim 15 , wherein the extracted one or more wafer shape parameters comprises at least one of local shape curvature (LSC) or in-plane distortion (IPD).

18. The system of claim 15 , further comprising:

inputting the extracted one or more wafer shape parameters of the first wafer and the second wafer and the first shape distortion and the second wafer shape distortion into a machine learning algorithm to predict overlay between one or more features on the first wafer and one or more features on the second wafer.

19. The system of claim 18 , furthering comprising:

training the machine learning algorithm.

20. The system of claim 19 , wherein the training the machine learning algorithm comprises:

training the machine learning algorithm with infrared overlay data.

21. A method comprising:

acquiring one or more stress-free shape measurements for a first wafer and a second wafer;

determining a first wafer shape distortion of the first wafer by comparing the first wafer shape to a first reference structure and determine a second wafer shape distortion of the second wafer by comparing the second wafer shape to a second reference structure;

predicting overlay between one or more features on the first wafer and one or more features on the second wafer based on the one or more stress-free shape measurements of the first wafer and the second wafer, the first wafer shape distortion, and the second wafer shape distortion; and

providing a feedforward adjustment to one or more process tools based on the predicted overlay.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Nov 28, 2023
From: ZACH, FRANZ; SMITH, MARK D.; SHEN, XIAOMENG; SAITO, JASON; OWEN, DAVID
To: KLA CORPORATION
Reel/Frame 065675/0887 →
Continuity (3)
Continuation 17161369 · Jan 28, 2021
Provisional Application 63124629 · Dec 11, 2020
Related Publication 20240094642A1 · Mar 21, 2024
References Cited (227)
US 5202748A · MacDonald et al. · 1993 [cited by applicant]
US 6064486A · Chen et al. · 2000 [cited by applicant]
US 6238939B1 · Wachs et al. · 2001 [cited by applicant]
US 6335791B1 · Miyatake · 2002 [cited by applicant]
US 6600565B1 · Suresh et al. · 2003 [cited by applicant]
US 6762846B1 · Poris · 2004 [cited by applicant]
US 6847458B2 · Freischlad et al. · 2005 [cited by applicant]
US 7056751B2 · Faris · 2006 [cited by examiner]
US 7079257B1 · Kirkpatrick et al. · 2006 [cited by applicant]
US 7433051B2 · Owen · 2008 [cited by applicant]
US 7570796B2 · Zafar et al. · 2009 [cited by applicant]
US 7676077B2 · Kulkarni et al. · 2010 [cited by applicant]
US 7875528B2 · La Tulipe, Jr. · 2011 [cited by examiner]
US 8163570B2 · Castex et al. · 2012 [cited by applicant]
US 8394719B2 · Tsen et al. · 2013 [cited by applicant]
US 8475612B2 · Gaudin · 2013 [cited by applicant]
US 8575002B2 · Broekaart et al. · 2013 [cited by applicant]
US 8640548B2 · Wimplinger · 2014 [cited by applicant]
US 8703368B2 · Lee · 2014 [cited by examiner]
US 8768665B2 · Veeraraghavan · 2014 [cited by examiner]
US 8769453B2 · Scheffer · 2014 [cited by examiner]
US 8859335B2 · Lee · 2014 [cited by examiner]
US 8892237B2 · Vaid et al. · 2014 [cited by applicant]
US 8900885B1 · Hubbard et al. · 2014 [cited by applicant]
US 8949057B1 · Seong et al. · 2015 [cited by applicant]
US 9087176B1 · Chang et al. · 2015 [cited by applicant]
US 9116442B2 · Adel et al. · 2015 [cited by applicant]
US 9121684B2 · Tang et al. · 2015 [cited by applicant]
US 9312161B2 · Wimplinger et al. · 2016 [cited by applicant]
US 9354526B2 · Vukkadala et al. · 2016 [cited by applicant]
US 9466538B1 · Skordas · 2016 [cited by examiner]
US 9733075B2 · Broekaart · 2017 [cited by examiner]
US 9779202B2 · Vukkadala · 2017 [cited by examiner]
US 9852972B2 · Seddon et al. · 2017 [cited by applicant]
US 9915625B2 · Gao et al. · 2018 [cited by applicant]
US 9935022B2 · Owen · 2018 [cited by examiner]
US 10024654B2 · Smith · 2018 [cited by examiner]
US 10234772B2 · Bangar et al. · 2019 [cited by applicant]
US 10249523B2 · Vukkadala · 2019 [cited by examiner]
US 10267746B2 · Duffy et al. · 2019 [cited by applicant]
US 10325798B2 · Wimplinger et al. · 2019 [cited by applicant]
US 10401279B2 · Vukkadala et al. · 2019 [cited by applicant]
US 10622233B2 · Hooge · 2020 [cited by examiner]
US 10788759B2 · Tsai et al. · 2020 [cited by applicant]
US 11289422B2 · Yan et al. · 2022 [cited by applicant]
US 11335607B2 · Ip · 2022 [cited by examiner]
US 11710649B2 · Mizuta · 2023 [cited by examiner]
US 11768441B2 · Ten Berge · 2023 [cited by examiner]
US 11782411B2 · Zach · 2023 [cited by examiner]
US 11829077B2 · Zach · 2023 [cited by examiner]
US 20020071112A1 · Smith et al. · 2002 [cited by applicant]
US 20020105649A1 · Smith et al. · 2002 [cited by applicant]
US 20040023466A1 · Yamauchi · 2004 [cited by applicant]
US 20040075825A1 · Suresh et al. · 2004 [cited by applicant]
US 20050066739A1 · Gotkis et al. · 2005 [cited by applicant]
US 20050087578A1 · Jackson · 2005 [cited by applicant]
US 20050147902A1 · Schaar et al. · 2005 [cited by applicant]
US 20050254030A1 · Tolsma et al. · 2005 [cited by applicant]
US 20050271955A1 · Cherala et al. · 2005 [cited by applicant]
US 20060141743A1 · Best et al. · 2006 [cited by applicant]
US 20060170934A1 · Picciotto et al. · 2006 [cited by applicant]
US 20060216025A1 · Kihara et al. · 2006 [cited by applicant]
US 20070037318A1 · Kim · 2007 [cited by applicant]
US 20070064243A1 · Yunus et al. · 2007 [cited by applicant]
US 20070212856A1 · Owen · 2007 [cited by applicant]
US 20070242271A1 · Moon · 2007 [cited by applicant]
US 20080030701A1 · Lof · 2008 [cited by applicant]
US 20080057418A1 · Seltmann et al. · 2008 [cited by applicant]
US 20080106714A1 · Okita · 2008 [cited by applicant]
US 20080182344A1 · Mueller et al. · 2008 [cited by applicant]
US 20080188036A1 · Tulipe et al. · 2008 [cited by applicant]
US 20080199978A1 · Fu et al. · 2008 [cited by applicant]
US 20080316442A1 · Adel et al. · 2008 [cited by applicant]
US 20100102470A1 · Mokaberi · 2010 [cited by applicant]
US 20110172982A1 · Veeraraghavan et al. · 2011 [cited by applicant]
US 20110210104A1 · Wahlsten et al. · 2011 [cited by applicant]
US 20110265578A1 · Johnson et al. · 2011 [cited by applicant]
US 20120255365A1 · Wimplinger · 2012 [cited by applicant]
US 20130054154A1 · Broekaart et al. · 2013 [cited by applicant]
US 20130286395A1 · Lee et al. · 2013 [cited by applicant]
US 20140057450A1 · Bourbina et al. · 2014 [cited by applicant]
US 20140102221A1 · Rebhan et al. · 2014 [cited by applicant]
US 20140209230A1 · Wagenleitner · 2014 [cited by applicant]
US 20150044786A1 · Huang et al. · 2015 [cited by applicant]
US 20150120216A1 · Vukkadala et al. · 2015 [cited by applicant]
US 20150279709A1 · La Tulipe et al. · 2015 [cited by applicant]
US 20160005662A1 · Yieh et al. · 2016 [cited by applicant]
US 20170243853A1 · Huang et al. · 2017 [cited by applicant]
US 20180165404A1 · Eyring et al. · 2018 [cited by applicant]
US 20180342410A1 · Hooge et al. · 2018 [cited by applicant]
US 20190148184A1 · Sugaya et al. · 2019 [cited by applicant]
US 20190206711A1 · Wimplinger et al. · 2019 [cited by applicant]
US 20190271542A1 · Shchegrov et al. · 2019 [cited by applicant]
US 20190287854A1 · Miller et al. · 2019 [cited by applicant]
US 20190353582A1 · Vukkadala et al. · 2019 [cited by applicant]
US 20200018709A1 · Hosler et al. · 2020 [cited by applicant]
US 20200091015A1 · Sugaya et al. · 2020 [cited by applicant]
US 20200328060A1 · Iizuka · 2020 [cited by applicant]
US 20210296147A1 · Mizuta · 2021 [cited by applicant]
US 20220187718A1 · Zach et al. · 2022 [cited by applicant]
US 20220230099A1 · Pandith et al. · 2022 [cited by applicant]
US 20220344282A1 · Subrahmanyan et al. · 2022 [cited by applicant]
US 20230030116A1 · Zach et al. · 2023 [cited by applicant]
US 20230032406A1 · Zach et al. · 2023 [cited by applicant]
US 20230035201A1 · Zach et al. · 2023 [cited by applicant]
US 20240094642A1 · Zach et al. · 2024 [cited by applicant]
CA 2334388A1 · 2000 [cited by applicant]
CN 100552908C · 2009 [cited by applicant]
CN 100562784C · 2009 [cited by applicant]
CN 101727011A · 2010 [cited by applicant]
CN 102656678B · 2015 [cited by applicant]
CN 104977816A · 2015 [cited by applicant]
CN 103283000B · 2016 [cited by applicant]
CN 106547171A · 2017 [cited by applicant]
CN 104658950B · 2018 [cited by applicant]
CN 109451761A · 2019 [cited by applicant]
CN 106887399B · 2020 [cited by applicant]
CN 109891563B · 2021 [cited by applicant]
CN 114361014A · 2022 [cited by applicant]
EP 1829130A1 · 2007 [cited by applicant]
EP 2299472A1 · 2011 [cited by applicant]
EP 2463892A1 · 2012 [cited by applicant]
EP 2463892B1 · 2013 [cited by applicant]
EP 2656378B1 · 2015 [cited by applicant]
EP 2863421A1 · 2015 [cited by applicant]
EP 1829130B1 · 2016 [cited by applicant]
EP 2854157B1 · 2019 [cited by applicant]
EP 3460833A1 · 2019 [cited by applicant]
GB 2462734B · 2010 [cited by applicant]
JP H11135413A · 1999 [cited by applicant]
JP H11176749A · 1999 [cited by applicant]
JP 2001068429A · 2001 [cited by applicant]
JP 2001077012A · 2001 [cited by applicant]
JP 2002118052A · 2002 [cited by applicant]
JP 2002229044 · 2005 [cited by applicant]
JP 2005233928A · 2005 [cited by applicant]
JP 2005251972A · 2005 [cited by applicant]
JP 2006186377A · 2006 [cited by applicant]
JP 2007158200A · 2007 [cited by applicant]
JP 2007173526A · 2007 [cited by applicant]
JP 2009113312A · 2009 [cited by applicant]
JP 2009529785A · 2009 [cited by applicant]
JP 2009239095A · 2009 [cited by applicant]
JP 2009294001B · 2009 [cited by applicant]
JP 2010529659A · 2010 [cited by applicant]
JP 2010272707A · 2010 [cited by applicant]
JP 5611371B2 · 2014 [cited by applicant]
JP 6279324B2 · 2018 [cited by applicant]
JP 2022098312A · 2022 [cited by applicant]
KR 20040014686A · 2004 [cited by applicant]
KR 20040046696A · 2004 [cited by applicant]
KR 100914446B1 · 2009 [cited by applicant]
KR 20090099871A · 2009 [cited by applicant]
KR 101313909B1 · 2013 [cited by applicant]
KR 101801409B1 · 2017 [cited by applicant]
KR 101849443B1 · 2018 [cited by applicant]
KR 101866622B1 · 2018 [cited by applicant]
KR 101866719B1 · 2018 [cited by applicant]
KR 20180065033A · 2018 [cited by applicant]
KR 102161093B1 · 2020 [cited by applicant]
SG 181435A1 · 2012 [cited by applicant]
SG 187694A1 · 2013 [cited by applicant]
TW I447842B · 2014 [cited by applicant]
TW I563548B · 2016 [cited by applicant]
TW I563549B · 2016 [cited by applicant]
TW I618130B · 2018 [cited by applicant]
TW I680506B · 2019 [cited by applicant]
WO 2005067046A1 · 2005 [cited by applicant]
WO 2009113312A1 · 2009 [cited by applicant]
WO 2012079786A1 · 2012 [cited by applicant]
WO 2012083978A1 · 2012 [cited by applicant]
WO 2012126752A1 · 2012 [cited by applicant]
WO 2012135513A1 · 2012 [cited by applicant]
WO 2013158039A3 · 2016 [cited by applicant]
WO 2019146427A1 · 2019 [cited by applicant]
WO 2020226152A1 · 2020 [cited by applicant]
WO 2021106527A1 · 2021 [cited by applicant]
Steen et al., (2007). Overlay as the key to drive wafer scale 3D integration. Microelectronic Engineering. 84. 1412-1415. 10.1016/j.mee.2007.01.231. [cited by applicant]
Tanaka, Tetsu et al., “3D LSI technology and reliability issues”, Digest of Technical Papers—Symposium on VLSI Technology (2011). [cited by applicant]
Tippur, Hareesh V . . . “Simultaneous and real-time measurement of slope and curvature fringes in thin structures using shearing interferometery.” Optical Engineering 43 (2004): 3014-3020. [cited by applicant]
Tupek, et al., “Submicron aligned wafer bonding via capillary forces.” Journal of Vacuum Science & Technology B 25 (2007): 1976-1981. [cited by applicant]
Turner et al., “Predicting distortions and overlay errors due to wafer deformation during chucking on lithography scanners,” J. Micro/Nanolith. MEMS MOEMS 8(4) 043015 (Oct. 1, 2009) https://doi.org/10.1117/1.3247857. [cited by applicant]
Turner, et al., (2002). Modeling of direct wafer bonding: Effect of wafer bow and etch patterns. Journal of Applied Physics. 92. 7658-7666. 10.1063/1.1521792. [cited by applicant]
Turner, et al., (2004). Mechanics of wafer bonding: Effect of clamping. Journal of Applied Physics. 95. 10.1063/1.1629776. [cited by applicant]
Turner, et al., “Mechanics of direct wafer bonding.” Proceedings of the Royal Society A: Mathematical, Physical and Engineering Sciences 462 (2005): 171-188. [cited by applicant]
Turner, Kevin T., “Wafer-Bonding: Mechanics-Based Models and Experiments”, Massachusetts Institute of Technology, May 2004, Thesis, 186 pages. [cited by applicant]
Y Gogotsi et al., “Raman Microspectroscopy Study of Processing-Induced Phase Transformations and Residual Stress in Silicon”, Semiconductor Science and Technology, vol. 14, No. 10, Department of Mechanical Engineering, … [cited by applicant]
Aitken et al., (2006). Discussion of tooling solutions for the direct bonding of silicon wafers. Microsystem Technologies. 12. 413-417. 10.1007/s00542-005-0028-4. [cited by applicant]
Aitken et al., “Glass-Glass Wafer Bonding for Microfluidic Devices.” Proceedings of the 2008 Second International Conference on Integration and Commercialization of Micro and Nanosystems. 2008 Second International Confe… [cited by applicant]
Asundi et al., “Rapid Defect Detections of Bonded Wafer Using Near Infrared Polariscope”, Nanyang Technological University Singapore2011, Retrieved From. [cited by applicant]
Burns et al., “A wafer-scale 3-D circuit integration technology,” in IEEE Transactions on Electron Devices, vol. 53, No. 10, pp. 2507-2516, Oct. 2006, doi: 10.1109/TED.2006.882043. [cited by applicant]
Burns J. et al. (2008) An SOI-Based 3D Circuit Integration Technology. In: Tan C., Gutmann R., Reif L. (eds) Wafer Level 3-D ICs Process Technology. Integrated Circuits and Systems. Springer, Boston, MA. https://doi.org… [cited by applicant]
Burns, et al. “An SOI-based three-dimensional integrated circuit technology.” 2000 IEEE International SOI Conference. Proceedings (Cat. No. 00CH37125) (2000): 20-21. [cited by applicant]
Byelyayev, Anton, “Stress diagnostics and crack detection in full-size silicon wafers using resonance ultrasonic vibrations” (2005). Graduate Theses and Dissertations.http://scholarcommons.usf.edu/etd/2969. [cited by applicant]
Chan, et al. “An approach for alignment, mounting, and integration of IXO mirror segments.” Optical Engineering + Applications (2009). [cited by applicant]
Chen, Kuan-Neng (2005). Copper Wafer Bonding in Three-Dimensional Integration [Published Doctoral thesis] Massachusetts Institute of Technology. [cited by applicant]
Chen, Kuan-Neng (2005). Copper Wafer Bonding in Three-Dimensional Integration [Unpublished Doctoral thesis] Massachusetts Institute of Technology. [cited by applicant]
Choi et al., (2005). Distortion and overlay performance of UV step and repeat imprint lithography. Microelectronic Engineering. 78-79. 633-640. 10.1016/j.mee.2004.12.097. [cited by applicant]
Cotte, et al., “Film stress changes during anodic bonding of NGL masks,” Proc. SPIE 3997, Emerging Lithographic Technologies IV, (Jul. 21, 2000); https://doi.org/10.1117/12.390089. [cited by applicant]
De Wolf, “Raman Spectroscopy: About Chips and Stress”, Ramanspectoscopy, IMEC, Kapeldreef 75, B-3001 Leuven, Belgium 2003. [cited by applicant]
Di Cioccio, et al., “Direct bonding for wafer level 3D integration,” 2010 IEEE International Conference on Integrated Circuit Design and Technology, 2010, pp. 110-113, doi: 10.1109/ICICDT.2010.5510276. [cited by applicant]
Feng, et al., (Jan. 14, 2007). “On the Stoney Formula for a Thin Film/Substrate System With Nonuniform Substrate Thickness.” ASME. J. Appl. Mech. Nov. 2007; 74(6): 1276-1281. https://doi.org/10.1115/1.2745392. [cited by applicant]
Garnier, A et al., “Results on aligned SiO2/SiO2 direct wafer-to-wafer low temperature bonding for 3D integration,” 2009 IEEE International SOI Conference, 2009, pp. 1-2, doi: 10.1109/SOI.2009.5318753. [cited by applicant]
Gegenwarth et al., “Effect Of Plastic Deformation Of Silicon Wafers On Overlay”, Proc. SPIE 0100, Developments in Semiconductor Microlithography II, (Aug. 8, 1977); https://doi.org/10.1117/12.955355. [cited by applicant]
Goyal, et al., “Solder bonding for microelectromechanical systems (MEMS) applications,” Proc. SPIE 4980, Reliability, Testing, and Characterization of MEMS/MOEMS II, (Jan. 16, 2003); https://doi.org/10.1117/12.478202. [cited by applicant]
Hanna et al., (1999). Numerical and experimental study of the evolution of stresses in flip chip assemblies during assembly and thermal cycling. 1001-1009. 10.1109/ECTC.1999.776308. [cited by applicant]
Hanna, et al., “Numerical and experimental study of the evolution of stresses in flip chip assemblies during assembly and thermal cycling,” 1999 Proceedings. 49th Electronic Components and Technology Conference (Cat. No… [cited by applicant]
Horn et al., (2008). Detection and Quantification of Surface Nanotopography-Induced Residual Stress Fields in Wafer-Bonded Silicon. Journal of The Electrochemical Society. 155. H36-H42. 10.1149/1.2799880. [cited by applicant]
Huston, et al., (2004). Active membrane masks for improved overlay performance in proximity lithography. Proc SPIE. 5388. 11-19. 10.1117/12.546598. [cited by applicant]
International Search Report and Written Opinion in Application No. PCT/US2021/061310 dated Mar. 28, 2022, 8 pages. [cited by applicant]
Lim, et al., “Warpage Modeling and Characterization to Simulate the Fabrication Process of Wafer-Level Adhesive Bonding,” 2007 32nd IEEE/CPMT International Electronic Manufacturing Technology Symposium, 2007, pp. 298-30… [cited by applicant]
Liu et al., Application of IVS Overlay Measurement to Wager Deformation Characterization Study (2004). [cited by applicant]
Meinhold et al., “Sensitive strain measurements of bonded SOI films using Moire/spl acute/,” in IEEE Transactions on Semiconductor Manufacturing, vol. 17, No. 1, pp. 35-41, Feb. 2004, doi: 10.1109/TSM.2003.823259. [cited by applicant]
Nagarajan, R. (2008). Commercialization of low temperature copper thermocompression bonding for 3D integrated circuits. [Published Masters thesis] Massachusetts Institute of Technology. [cited by applicant]
Nagarajan, R. (2009). Commercialization of low temperature copper thermocompression bonding for 3D integrated circuits. [unpublished Masters thesis] Massachusetts Institute of Technology. [cited by applicant]
Nagaswami et al., Overlay error components in double-patterning lithography, retrieved from Internet Sep. 2010. [cited by applicant]
Nagaswami, et al., “Double Patterning Lithography Overlay Components,” 6th International Symp. on Immersion Lithography Extensions, Prague, Nov. 2009. [cited by applicant]
Nagaswami, et al., “DPL Overlay Components,” 6th International Symp. on Immersion Lithography Extensions, Prague, Nov. 2009. [cited by applicant]
Nagaswami, et al., (2010). Overlay error components in double-patterning lithography. Solid State Technology. 53. 26-28. [cited by applicant]
Raghunathan et al., “Correlation of overlay performance and reticle substrate non-flatness effects in EUV lithography”, Proc. SPIE 7488, Photomask Technology 2009, 748816 (Sep. 30, 2009); https://doi.org/10.1117/12.8347… [cited by applicant]
Rudack et al., “IR microscopy as an early electrical yield indicator in bonded wafer pairs used for 3D integration,” Proc. SPIE 7638, Metrology, Inspection, and Process Control for Microlithography XXIV, 763815 (Apr. 1,… [cited by applicant]
Schaper,et al., “Induced thermal stress fields for three-dimensional distortion control of Si wafer topography”, <i>Review of Scientific Instruments</i>, vol. 75, No. 6, pp. 1997-2002, 2004. doi:10.1063/1.1753101. [cited by applicant]
Search Report and Written Opinion in International Application No. PCT/US2022/036745 dated Nov. 9, 2022, 8 pages. [cited by applicant]
Search Report and Written Opinion in International Application No. PCT/US2022/037522 dated Nov. 9, 2022. 9 pages. [cited by applicant]
Search Report and Written Opinion in International Application No. PCT/US2022/038412 dated Nov. 16, 2022, 8 pages. [cited by applicant]
Shetty, et al., “Impact of laser spike annealing dwell time on wafer stress and photolithography overlay errors,” 2009 International Workshop on Junction Technology, 2009, pp. 119-122, doi: 10.1109/IWJT.2009.5166234. [cited by applicant]
Korean Intellectual Property Office, International Search Report and Written Opinion for International Application No. PCT/US2023/032022, Dec. 28, 2023, 9 pages. [cited by applicant]
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