IP Library Granted Patent US 10,283,552
Granted Patent B2
US 10,283,552 · App. 16/004,061 · Granted May 7, 2019

Solid-state imaging device with suppression of color mixture manufacturing method thereof, and electronic apparatus

Inventor: Takekazu Shinohara (Kumamoto, JP)
Assignee: Sony Corporation
H01L27/1464H01L27/1463H01L27/14605H01L27/14623H01L27/14636H01L27/14641H01L27/14643H01L27/14645H01L27/14685H01L27/14689H04N5/374H01L27/14621H01L27/14627
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Quick Facts
Patent No.
US 10,283,552
App. No.
16/004,061
Granted
May 7, 2019
Kind
B2
Abstract

A solid-state imaging device having a backside illuminated structure, includes: a pixel region in which pixels each having a photoelectric conversion portion and a plurality of pixel transistors are arranged in a two-dimensional matrix; an element isolation region isolating the pixels which is provided in the pixel region and which includes a semiconductor layer provided in a trench by an epitaxial growth; and a light receiving surface at a rear surface side of a semiconductor substrate which is opposite to a multilayer wiring layer.

Claims (54)

1. An imaging device, comprising:

a semiconductor substrate including a first side as a light-receiving side, and a second side opposite to the first side;

a plurality of photoelectric conversion regions in the semiconductor substrate, the plurality of the photoelectric conversion regions comprising;

a first photoelectric conversion region,

a second photoelectric conversion region,

a third photoelectric conversion region, and

a fourth photoelectric conversion region; wherein

the first photoelectric conversion region is adjacent to the second photoelectric conversion region in a first direction in a plan view, and the first photoelectric conversion region is adjacent to the third photoelectric conversion region in a second direction in the plan view;

a floating diffusion region shared by the first, the second, the third and the fourth photoelectric conversion regions;

a first element isolation region disposed between the first photoelectric conversion region and the second photoelectric conversion region;

a second element isolation region disposed between the first photoelectric conversion region and the third photoelectric conversion region;

a first light-shielding film disposed over the first element isolation region;

a second light-shielding film disposed over the second element isolation region;

a multilayer wiring layer disposed at the second side of the semiconductor substrate; and

a third element isolation region disposed between the second photoelectric conversion region and the fourth photoelectric conversion region, wherein

the first element isolation region comprises a first void region, and

the second element isolation region comprises a second void region.

2. The imaging device according to claim 1 , wherein the first, the second, the third, and the fourth photoelectric conversion regions are arranged in a 2×2 matrix.

3. The imaging device according to claim 2 , further comprising a reset transistor, an amplification transistor, and a selection transistor.

4. The imaging device according to claim 3 , wherein the first, the second, the third, and the fourth photoelectric conversion regions share the reset transistor, the amplification transistor, and the selection transistor.

5. The imaging device according to claim 1 , wherein a first insulating film is disposed in the first void region and the second void region.

6. The imaging device according to claim 5 , wherein the second photoelectric conversion region is adjacent to the fourth photoelectric conversion region in the second direction in the plan view.

7. The imaging device according to claim 5 , wherein the third element isolation region comprises a p-type region comprising a third void region.

8. The imaging device according to claim 7 , wherein the first insulating film is disposed in the third void region.

9. The imaging device according to claim 1 , wherein the first element isolation region comprises a first p-type region comprising the first void region.

10. The imaging device according to claim 9 , wherein the second element isolation region comprises a second p-type region comprising the second void region.

11. The imaging device according to claim 1 , wherein the first direction is perpendicular to the second direction.

12. The imaging device according to claim 1 , wherein the first direction is perpendicular to the second direction.

13. An imaging device, comprising:

a semiconductor substrate including a first side as a light-receiving side, and a second side opposite to the first side;

a plurality of photoelectric conversion regions in the semiconductor substrate, the plurality of the photoelectric conversion regions comprising;

a first photoelectric conversion region,

a second photoelectric conversion region,

a third photoelectric conversion region, and

a fourth photoelectric conversion region; wherein

the first photoelectric conversion region is adjacent to the second photoelectric conversion region in a first direction in a plan view, and the first photoelectric conversion region is adjacent to the third photoelectric conversion region in a second direction in the plan view;

a floating diffusion region shared by the first, the second, the third and the fourth photoelectric conversion regions;

a first element isolation region disposed between the first photoelectric conversion region and the second photoelectric conversion region;

a second element isolation region disposed between the first photoelectric conversion region and the third photoelectric conversion region;

a multilayer wiring layer disposed at the second side of the semiconductor substrate; and

a third element isolation region disposed between the second photoelectric conversion region and the fourth photoelectric conversion region, wherein

the first element isolation region comprises a first void region, and

the second element isolation region comprises a second void region.

14. The imaging device according to claim 13 , wherein the first, the second, the third, and the fourth photoelectric conversion regions are arranged in a 2×2 matrix.

15. The imaging device according to claim 14 , further comprising a reset transistor, an amplification transistor, and a selection transistor.

16. The imaging device according to claim 15 , wherein the first, the second, the third, and the fourth photoelectric conversion regions share the reset transistor, the amplification transistor, and the selection transistor.

17. The imaging device according to claim 13 , wherein a first insulating film is disposed in the first void region and the second void region.

18. The imaging device according to claim 17 , wherein the second photoelectric conversion region is adjacent to the fourth photoelectric conversion region in the second direction in the plan view.

19. The imaging device according to claim 17 , wherein the third element isolation region comprises a p-type region comprising a third void region.

20. The imaging device according to claim 19 , wherein the first insulating film is disposed in the third void region.

21. The imaging device according to claim 20 , further comprising a first light-shielding film disposed over the first element isolation region.

22. The imaging device according to claim 21 , further comprising a second light-shielding film disposed over the second element isolation region.

23. The imaging device according to claim 13 , wherein the first element isolation region comprises a first p-type region comprising the first void region.

24. The imaging device according to claim 23 , wherein the second element isolation region comprises a second p-type region comprising the second void region.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jun 17, 2020
From: SHINOHARA, TAKEKAZU
To: SONY CORPORATION
Reel/Frame 052960/0224 →
Priority Claims (1)
JP 2010-179073 · Aug 9, 2010 · national
Continuity (6)
Continuation 15653027 · Jul 18, 2017
Continuation 15380461 · Dec 15, 2016
Continuation 15065437 · Mar 9, 2016
Continuation 14260118 · Apr 23, 2014
Continuation 13196127 · Aug 2, 2011
Related Publication 20180294296A1 · Oct 11, 2018