Carrier warpage control for three dimensional integrated circuit (3DIC) stacking

1. A package-on-package (PoP) device comprising:

a substrate having conductive features;

a first die over the substrate and electrically coupled to the conductive features of the substrate, wherein the first die comprises:

a first substrate, a first side of the first substrate facing the substrate, a second side of the first substrate facing away from the substrate;

through vias in the first substrate extending from the first side of the first substrate to the second side of the first substrate;

first aluminum pads contacting and extending along the first side of the first substrate;

second aluminum pads contacting and extending along the second side of the first substrate, wherein each of the through vias is disposed between a respective first aluminum pad and a respective second aluminum pad;

a first passivation layer along the first side of the first substrate, wherein the first passivation layer covers first portions of the first aluminum pads and exposes second portions of the first aluminum pads;

a second passivation layer along the second side of the first substrate, wherein the second passivation layer covers first portions of the second aluminum pads and exposes second portions of the second aluminum pads;

first conductive pillars proximate the first side of the first substrate and electrically coupled to the exposed second portions of the first aluminum pads; and

second conductive pillars proximate the second side of the first substrate and electrically coupled to the exposed second portions of the second aluminum pads, wherein the first conductive pillars are bonded to the substrate;

a second die over the first die and electrically coupled to the first die, wherein the second die is horizontally offset relative to the first die;

a first underfill material between the first die and the substrate;

a second underfill material between the second die and the first die; and

a molding material over the substrate, around the first die, and around the second die, wherein the molding material is different from the first underfill material.

2. The PoP device of claim 1 , further comprising:

first solder regions between the first conductive pillars and the substrate; and

second solder regions between the second conductive pillars and the second die.

3. The PoP device of claim 2 , wherein the first conductive pillars are spaced apart from the first passivation layer, and the second conductive pillars are spaced apart from the second passivation layer.

4. The PoP device of claim 1 , wherein the substrate is an organic substrate, a ceramic substrate, a silicon substrate, a glass substrate, or a laminate substrate.

5. The PoP device of claim 1 , wherein the conductive features comprise conductive lines and vias.

6. The PoP device of claim 1 , wherein sidewalls of the first substrate are free of the molding material.

7. The PoP device of claim 1 , wherein the first die further comprises:

a first dielectric layer along a first side of the first passivation layer distal to the first substrate, wherein the first passivation layer is separated from the first conductive pillars by the first dielectric layer.

8. The PoP device of claim 7 , wherein the first dielectric layer physically contacts the first aluminum pads.

9. The PoP device of claim 7 , wherein the first die further comprises:

a second dielectric layer along a second side of the second passivation layer distal to the first substrate, wherein the second passivation layer is separated from the second conductive pillars by the second dielectric layer.

10. The PoP device of claim 9 , wherein the first dielectric layer physically contacts the first aluminum pads, and the second dielectric layer physically contacts the second aluminum pads.