Method for fabricating a memory device having two contacts
View Patent ↗A memory device with a dielectric layer or an air gap between contacts and a method of making the same are disclosed. The method comprises a series of steps including forming a plurality of conductive lines having trenches therebetween; forming a contact layer in the trench; and forming a dielectric layer interposed in the contact layer and configured to divide the contact layer into two contacts. The method also comprises removing the dielectric layer to form a space and forming a cap layer over the two contacts to form an air gap therein. The method further comprises forming a second air gap between the conductive line and the two contacts.
1. A method for fabricating a memory device, the method comprising:
forming shallow trench isolation regions in a substrate;
forming conductive lines on the substrate, the conductive lines having trenches extending laterally therebetween;
forming a contact material in the trenches;
removing a portion of the contact material to form an opening to expose the substrate;
after removing the portion of the contact material, forming a dielectric material over the shallow trench isolation regions and extending vertically between opposing portions of the contact material, the dielectric material configured to separate the contact material into two separate contacts;
forming a first air gap over one of the shallow trench isolation regions and between the two separate contacts; and
forming a second air gap between a conductive line of the conductive lines and a contact of the two separate contacts.
2. The method of claim 1 , wherein forming the dielectric material extending vertically between the opposing portions of the contact material comprises:
forming a hard mask over the contact material and having an opening therein;
patterning the contact material through the opening of the hard mask to form the opening in the contact material; and
filling the opening with the dielectric material.
3. The method of claim 1 , wherein forming the first air gap between the two separate contacts comprises:
removing the dielectric material; and
forming a cap material over the two separate contacts to form the first air gap between the two separate contacts.
4. The method of claim 3 , wherein removing the dielectric material is performed by dry etching, wet etching, plasma etching, or a combination thereof.
5. The method of claim 1 , further comprising forming an etch stop material between the dielectric material and a contact of the two separate contacts.
6. The method of claim 1 , wherein forming the second air gap between the conductive line and the contact comprises:
forming an oxide material between the conductive line and the contact;
removing the oxide material; and
forming a cap material over the conductive line and the contact to form the second air gap between the conductive line and the contact.
7. The method of claim 6 , further comprising forming a second etch stop material on sidewalls of the oxide material.
8. A method of forming a semiconductor device, the method comprising:
forming shallow trench isolation regions in a substrate;
forming a contact material in trenches extending laterally between conductive lines located on the substrate;
removing a portion of the contact material to expose the substrate and to form two contacts, each of the two contacts located proximate a respective conductive line;
after removing the portion of the contact material, vertically interposing a dielectric material between the two contacts to separate the two contacts from one another, the dielectric material formed over the shallow trench isolation regions; and
forming a cap material over the conductive lines and the two contacts to form a first air gap between the two contacts and a second air gap between one contact of the two contacts and the respective conductive line, wherein the first air gap located between the two contacts is over one of the shallow trench isolation regions.
9. The method of claim 8 , further comprising forming a first gate structure on the substrate and forming a second gate structure in the substrate.
10. The method of claim 9 , wherein forming the first gate structure and the second gate structure comprises forming at least one of a single-layer structure or a multi-layer structure.
11. The method of claim 9 , wherein forming the first gate structure comprises forming at least one of a word line or a bit line.
12. The method of claim 8 , wherein vertically interposing the dielectric material between the two contacts comprises forming the dielectric material on at least a portion of the substrate.
13. The method of claim 8 , further comprising forming another dielectric material on the dielectric material.
14. The method of claim 13 , further comprising selectively removing at least a portion of the dielectric material and the another dielectric material to form openings prior to forming the cap material.