Wafer level light-emitting diode array
A light emitting diode array is provide to include: a substrate; light emitting diodes positioned over the substrate, each including a first semiconductor layer, an active layer, and a second semiconductor layer, wherein each light emitting diode is disposed to form a first via hole structure exposing a portion of the corresponding first semiconductor layer; lower electrodes disposed over the second semiconductor layer; a first interlayer insulating layer disposed over the lower electrodes and configured to expose the portion of the first semiconductor layer of corresponding light emitting diodes; upper electrodes electrically connected to the first semiconductor layer through the first via hole structure, wherein the first via hole structure is disposed in parallel with one side of the corresponding second semiconductor layer and the first interlayer insulating layer is disposed to form a second via hole structure exposing a portion of the lower electrodes.
1. A light emitting diode array, comprising:
a substrate;
first and second light emitting diodes positioned over the substrate, each light emitting diode including a first semiconductor layer, an active layer, and a second semiconductor layer, wherein each light emitting diode is disposed between an internal side surface and an external side surface that are located on opposite sides of the each light emitting diode, the internal side surfaces of the first and second light emitting diodes being inclined and positioned facing each other;
a reflective layer disposed over the second semiconductor layer of corresponding light emitting diodes and configured to be in ohmic-contact with the second semiconductor layer;
a first interlayer insulating layer disposed over the reflective layer to expose portions of the reflective layer of the first and second light emitting diodes; and
an electrode formed over the first and second light emitting diodes and electrically connected to the first semiconductor layer of the first light emitting diode and the second semiconductor layer of the second light emitting diode through an exposed portion of the reflective layer,
wherein the electrode covers the internal side surfaces of the first and second light emitting diodes and has an inclined side surface formed along the internal side surfaces of the first and second light emitting diodes.
2. The light emitting diode array of claim 1 , further including a second interlayer insulating layer disposed over the electrode.
3. The light emitting diode array of claim 1 , wherein the first interlayer insulating layer includes a distributed Bragg reflector.
4. The light emitting diode array of claim 1 , wherein the internal and external side surfaces of the first and second light emitting diodes have an inclination angle of 10 to 60 degrees with respect to a surface of the substrate.
5. The light emitting diode array of claim 1 , wherein the first interlayer insulating layer has a thickness of 2000 to 20000 Å.
6. The light emitting diode array of claim 1 , wherein the inclined side surface of the electrode has an inclination angle of 10 to 45 degrees with respect to a surface of the second semiconductor layer.
7. The light emitting diode array of claim 1 , wherein the exposed portion of the reflective layer is located over the second light emitting diode.
8. The light emitting diode array of claim 1 , wherein the electrode is further electrically connected to the first semiconductor layer of the second light emitting diode.
9. The light emitting diode array of claim 1 , wherein the electrode includes a first portion formed over the first light emitting diode and the second light emitting diode and a second portion formed over the second light emitting diode, the first portion being separated from the second portion.
10. The light emitting diode array of claim 9 , wherein the first portion contacts the first semiconductor layer of the first light emitting diode and the reflective layer of the second light emitting diode.
11. The light emitting diode array of claim 9 , wherein the second portion contacts the first semiconductor layer of the second light emitting diode.
12. The light emitting diode array of claim 1 , wherein the reflective layer includes Al, Ag, Rh or Pt.
13. The light emitting diode array of claim 1 , wherein one of light emitting diodes comprising a via hole structure exposing a portion of the corresponding first semiconductor layer, and
wherein the via hole structure includes an inclined side surface.
14. A light emitting diode array, comprising:
a substrate having a first cell region and a second cell region that are arranged between edges of the substrate;
a first light emitting diode formed in a first cell region and a second light emitting diode formed in a second cell region, each light emitting diode formed over the substrate and including a first semiconductor layer, an active layer, and a second semiconductor layer and having an internal side surface and an external side surface that are disposed on opposite sides of each light emitting diode, the external side surfaces located closer to an edge of the substrate than the internal side surfaces;
a first electrode over the second semiconductor layer of the first light emitting diode and the second light emitting diode and configured to be in ohmic-contact with the second semiconductor layer;
a first interlayer insulating layer disposed over the first electrode to expose a portion of the first electrode in the first cell region; and
a second electrode electrically connecting the first light emitting diode to the second light emitting diode, the second electrode covering the external side surface of the second light emitting diode,
wherein the second electrode contacts the portion of the first electrode in the first cell region and does not contact with the first electrode in the second cell region.
15. The light emitting diode array of claim 14 , wherein the second electrode formed over the first light emitting diode is extended to a portion over the second light emitting diode.
16. The light emitting diode array of claim 14 , wherein the internal side surface and the external side surface of the first electrode has an inclination angle of 10 to 45 degrees with respect to a surface of the second semiconductor layer.
17. The light emitting diode array of claim 14 , wherein the internal and external side surfaces of the first light emitting diode and the second light emitting diode have an inclination angle of 10 to 60 degrees with respect to a surface of the substrate.
18. The light emitting diode array of claim 14 , further including a second interlayer insulating layer disposed over the second electrode.
19. The light emitting diode array of claim 14 , wherein the second electrode is electrically connected to the first semiconductor layer of the first light emitting diode in the first cell region and to the second semiconductor layer of the second light emitting diode in the second cell region.
20. The light emitting diode array of claim 14 , wherein the second electrode includes a first portion formed over the first light emitting diode and the second light emitting diode and a second portion formed over the second light emitting diode, the first portion being separated from the second portion.
21. The light emitting diode array of claim 14 , wherein the second electrode is electrically connected to the first semiconductor layer of the second light emitting diode in the second cell region.
22. The light emitting diode array of claim 14 , wherein the first electrode includes a reflective layer.
23. The light emitting diode array of claim 14 , wherein the second electrode includes a reflective conductive layer.