Solid-state imaging device and manufacturing method therefor

1. A solid-state imaging device comprising:

a plurality of pixels, the pixel including

a photoelectric conversion unit including a first semiconductor region of a first conductivity type,

a floating diffusion region of a first conductivity type, and

a transfer transistor including a transferring gate electrode configured to transfer signal charge generated at the photoelectric conversion unit to the floating diffusion region;

a signal processing circuit for processing a signal output from the plurality of pixels;

a first semiconductor substrate; and

a second semiconductor substrate,

wherein

the first semiconductor substrate includes a pixel region;

a plurality of the photoelectric conversion units and a plurality of the floating diffusion regions are arranged in the pixel region;

a first element isolation portion is provided in the pixel region, the first element isolation portion being configured to electrically isolate at least two selected from the plurality of the photoelectric conversion units and the plurality of the floating diffusion regions, and including a semiconductor region of a second conductivity type different from the first conductivity type,

the second semiconductor substrate includes a circuit region,

a plurality of transistors included in the signal processing circuit are arranged in the circuit region;

a second element isolation portion is arranged in the circuit region, the second element isolation portion configured to electrically isolate at least two of the plurality of transistors, and including an insulator portion, and

the first substrate and the second substrate are connected via a connection portion in which a first electrically-conductive pattern of the first substrate and a first electrically-conductive pattern of the second substrate are in contact with each other and an insulating layer of the first substrate and an insulating layer of the second substrate are in contact with each other.

2. The solid-state imaging device according to claim 1 ,

wherein

the pixel includes

a pixel transistor having a gate electrode connected to the floating diffusion region, and

a reset transistor configured to reset a voltage of the floating diffusion region,

a second electrically-conductive pattern electrically connects the floating diffusion region and the gate electrode of the pixel transistor,

a first surface of the first semiconductor substrate faces the second semiconductor substrate,

the second electrically-conductive pattern is interposed between the first surface of the first semiconductor substrate and the second semiconductor substrate,

the second electrically-conductive pattern is interposed between the first surface of the first semiconductor substrate and the first electrically-conductive pattern, and

light is incident on the first semiconductor substrate from a second surface opposite to the first surface.

3. The solid-state imaging device according to claim 2 ,

wherein

the first element isolation portion and the second element isolation portion have different thicknesses from each other.

4. The solid-state imaging device according to claim 3 ,

wherein

the first semiconductor substrate has a thickness where a part of the light reaches the first surface of the first semiconductor substrate, and

the first surface of the first semiconductor substrate includes a (1 0 0)-surface.

5. The solid-state imaging device according to claim 4 ,

wherein the first electrically-conductive pattern is formed of copper.

6. The solid-state imaging device according to claim 5 ,

wherein the plurality of transistors included in the signal processing circuit includes a silicide formed thereon.

7. A solid-state imaging device comprising:

a plurality of pixels, the pixel including

a photoelectric conversion unit,

a floating diffusion region,

a transferring transistor including a transferring gate electrode configured to transfer signal charge generated at the photoelectric conversion unit to the floating diffusion region,

an amplifying transistor configured to output a signal based on an amount of electric charge of the floating diffusion region, and

a resetting transistor configured to reset a voltage of the floating diffusion region;

a signal processing circuit for processing a signal output from the plurality of pixels;

a first semiconductor substrate; and

a second semiconductor substrate,

wherein a first insulating film is provided on a first surface of the first semiconductor substrate,

wherein the first semiconductor substrate includes a pixel region;

wherein a plurality of photoelectric conversion units and a plurality of floating diffusion regions are arranged in the pixel region;

wherein the second semiconductor substrate includes a circuit region;

wherein a plurality of transistors included in the signal processing circuit are arranged in the circuit region;

wherein an element isolation portion is arranged in the circuit region, configured to electrically isolate at least a part of the plurality of transistors;

wherein an interface between the pixel region and the first insulating film is flat;

wherein an interface of a region where the element isolation portion is provided, between the second semiconductor substrate and the second insulating film, is arranged at a first depth with respect to an interface of a region where the transistor included in the signal processing circuit is arranged, between the second semiconductor substrate and the second insulating film; and

wherein the first depth is larger than zero.

8. The solid-state imaging device according to claim 7 , wherein light is incident on the first semiconductor substrate from a second surface side thereof, the second surface being opposite to the first surface of the first semiconductor substrate.

9. The solid-state imaging device according to claim 8 , further comprising:

an electrically-conductive pattern configured to electrically connect the floating diffusion region and a gate electrode of the amplifying transistor,

wherein the first surface of the first semiconductor substrate faces a surface of the second semiconductor substrate on which the gate electrode of the amplifying transistor is arranged, the electrically-conductive pattern being interposed therebetween.

10. The solid-state imaging device according to claim 9 ,

wherein a pixel element isolation portion is arranged in the pixel region, configured to electrically isolate at least two of the plurality of photoelectric conversion regions,

wherein the pixel element isolation portion is one of PN isolation, mesa-type insulator isolation, and EDI isolation, and

wherein the element isolation portion is one of LOCOS isolation and STI isolation.

11. The solid-state imaging device according to claim 10 ,

wherein the first surface of the first semiconductor substrate includes a (1 0 0)-surface.

12. The solid-state imaging device according to claim 11 ,

wherein the plurality of pixels form a matrix including a plurality of pixel columns,

wherein the signal processing circuit includes a plurality of column circuits respectively corresponding to the plurality of pixel columns, and

wherein the column circuit includes an analog-to-digital convertor.

13. The solid-state imaging device according to claim 7 ,

wherein the photoelectric conversion unit includes

a first semiconductor region of a first conductivity type configured to collect a signal charge,

a second semiconductor region of a second conductivity type provided between the first semiconductor region and the first surface of the first semiconductor substrate, and

a third semiconductor region of the second conductivity type provided between the first semiconductor region and a second surface being opposite to the first surface of the first semiconductor substrate,

wherein the first, second and third semiconductor regions forms an embedded-type photodiode,

wherein the floating diffusion region has a higher impurity concentration than an impurity concentration of the first semiconductor region, and

wherein the second semiconductor region has a higher impurity concentration than an impurity concentration of a pixel element isolation portion which is arranged in the pixel region and configured to electrically isolate at least two of the plurality of photoelectric conversion regions.

14. The solid-state imaging device according to claim 13 ,

wherein the transferring transistor includes a channel region implanted with a channel impurity,

wherein a negative voltage is applied to the transferring gate electrode during an exposure time period, and

the transistor included in the signal processing circuit includes a silicide formed thereon.

15. The solid-state imaging device according to claim 14 , further comprising:

a contact plug configured to supply the reverse bias voltage to the pixel element isolation portion.

16. The solid-state imaging device according to claim 15 , further comprising:

a light shielding portion provided on the second surface;

a color filter provided on the second surface; and

a microlens provided on the second surface.

17. A signal processing circuit substrate connectable to a photoelectric conversion substrate,

wherein

the photoelectric conversion substrate includes

a pixel region;

a plurality of the photoelectric conversion units each including a first semiconductor region of a first conductivity type and arranged in the pixel region;

a plurality of the floating diffusion regions arranged in the pixel region; and

a first element isolation portion provided in the pixel region, and configured to electrically isolate two selected from the plurality of the photoelectric conversion units and the plurality of the floating diffusion regions, and

the first element isolation portion includes a second semiconductor region of a second conductivity type which contacts a first insulating film disposed on a first surface of the first semiconductor substrate and a second insulating film disposed on a second surface of the first semiconductor substrate, the second surface being opposite to the first surface,

the signal processing circuit substrate comprising:

a signal processing circuit configured to process a signal output from the plurality of photoelectric conversion units;

a plurality of transistors included in the signal processing circuit; and

a second element isolation portion configured to electrically isolate at least a part of the plurality of transistors and including an insulator portion.

18. The solid-state imaging device according to claim 1 , wherein

the first electrically-conductive pattern includes a plurality of conductive portions corresponding to the plurality of pixels, each of the plurality of conductive portions forming the connection portion, and

the plurality of conductive portions are electrically isolated by the insulating layer.

19. The solid-state imaging device according to claim 1 , wherein

the second substrate includes a semiconductor region provided between the insulator portion of the second element isolation portion and a bottom of the second substrate.

20. The solid-state imaging device according to claim 2 , wherein

the first electrically-conductive pattern includes a plurality of conductive portions corresponding to the plurality of pixels, each of the plurality of conductive portions forming the connection portion, and

the plurality of conductive portions are electrically isolated by the insulating layer.

21. The solid-state imaging device according to claim 20 , wherein

the second substrate includes a semiconductor region provided between the insulator portion of the second element isolation portion and a bottom of the second substrate.

22. The solid-state imaging device according to claim 21 ,

wherein the photoelectric conversion unit includes

a first semiconductor region of a first conductivity type configured to collect a signal charge,

a second semiconductor region of a second conductivity type provided between the first semiconductor region and the first surface of the first semiconductor substrate, and

a third semiconductor region of the second conductivity type provided between the first semiconductor region and a second surface being opposite to the first surface of the first semiconductor substrate,

wherein the first, second and third semiconductor regions forms an embedded-type photodiode,

wherein the floating diffusion region has a higher impurity concentration than an impurity concentration of the first semiconductor region.

23. The solid-state imaging device according to claim 21 ,

wherein the transferring transistor includes a channel region implanted with a channel impurity,

wherein a negative voltage is applied to the transferring gate electrode during an exposure time period.

24. The solid-state imaging device according to claim 21 , further comprising:

a contact plug configured to supply the reverse bias voltage to the first element isolation portion.

25. The solid-state imaging device according to claim 21 , further comprising:

a color filter provided on the second surface of the first substrate; and

a microlens provided on the second surface of the first substrate.

26. The solid-state imaging device according to claim 21 ,

wherein

the first semiconductor substrate has a thickness where a part of the light reaches the first surface of the first semiconductor substrate, and

the first surface of the first semiconductor substrate includes a (1 0 0)-surface.

27. The solid-state imaging device according to claim 21 ,

wherein the first electrically-conductive pattern is formed of cupper.

28. The solid-state imaging device according to claim 21 ,

the plurality of transistors included in the signal processing circuit includes a silicide formed thereon.

29. The solid-state imaging device according to claim 21 , wherein

the first electrically-conductive pattern further includes a plurality of second conductive portions,

the plurality of pixels form a matrix including a plurality of pixel rows, and

the plurality of second conductive portions are respectively connected to the plurality of pixel rows.

30. The solid-state imaging device according to claim 21 ,

wherein the plurality of pixels form a matrix including a plurality of pixel columns,

wherein the signal processing circuit includes a plurality of column circuits respectively corresponding to the plurality of pixel columns, and

wherein the column circuit includes an analog-to-digital convertor.