Method for fabricating semiconductor device having buried metal line
A method includes etching a semiconductor substrate to form a fin. An isolation structure is formed over the semiconductor substrate and around the fin. The isolation structure and the semiconductor substrate are etched to form a recess. A barrier layer is deposited over a bottom surface and a sidewall of the recess. A conductive layer is deposited over the barrier layer. The conductive layer is recessed to form a conductive line, in which a top surface of the conductive line is lower than a top surface of the isolation structure. A dielectric cap layer is formed over the conductive line. The isolation structure and the dielectric cap layer are recessed, such that the fin protrudes from the recessed isolation structure.
1. A method, comprising:
etching a semiconductor substrate to form a fin;
forming an isolation structure over the semiconductor substrate and around the fin;
etching the isolation structure and the semiconductor substrate to form a recess;
depositing a barrier layer over a bottom surface and a sidewall of the recess;
depositing a conductive layer over the barrier layer;
recessing the conductive layer to form a conductive line, wherein a top surface of the conductive line is lower than a top surface of the isolation structure;
forming a dielectric cap layer over the conductive line; and
recessing the isolation structure and the dielectric cap layer, such that the fin protrudes from the recessed isolation structure.
2. The method of claim 1 , further comprising:
depositing a glue layer over the barrier layer prior to depositing the conductive layer.
3. The method of claim 2 , wherein the glue layer comprises tungsten, tantalum, titanium, titanium nitride, tantalum nitride, or combinations thereof.
4. The method of claim 1 , wherein the barrier layer comprises a dielectric material.
5. A method, comprising:
etching a semiconductor substrate to form a fin;
etching the semiconductor substrate to form a recess adjacent to the fin;
depositing a first barrier layer over a bottom surface and a sidewall of the recess;
depositing a conductive layer over the first barrier layer;
recessing the conductive layer to form a conductive line, wherein a top surface of the conductive line is lower than a top surface of the fin;
forming an isolation structure over the conductive line and around the fin; and
recessing the isolation structure, such that the fin protrudes from the recessed isolation structure.
6. The method of claim 5 , further comprising:
depositing a second barrier layer over the fin prior to etching the semiconductor substrate to form the recess.
7. The method of claim 5 , further comprising:
forming a source/drain structure over the fin;
depositing an interlayer dielectric layer over the source/drain structure;
etching the interlayer dielectric layer and the isolation structure to expose the source/drain structure and the conductive line; and
forming a contact over the exposed source/drain structure, wherein a portion of the contact lands on the exposed conductive line.
8. A method, comprising:
etching a semiconductor substrate to form a fin;
forming a shallow trench isolation (STI) structure around the fin;
etching the STI structure to form a recess in the STI structure;
forming a metal line in the recess in the STI structure and a dielectric cap layer atop the metal line; and
after forming the metal line, recessing the STI structure to expose sidewalls of the fin.
9. The method of claim 8 , further comprising:
etching the semiconductor substrate to extend the recess into the semiconductor substrate before forming the metal line.
10. The method of claim 8 , wherein forming the metal line comprises:
depositing a barrier layer to line the recess in the STI structure; and
after depositing the barrier layer, filling the recess with a metal material.
11. The method of claim 10 , wherein forming the metal line further comprises:
removing a portion of the barrier layer and a portion of the metal material from above the fin and the STI structure.
12. The method of claim 10 , wherein forming the metal line further comprises:
recessing the metal material until a top surface of the metal material is lower than a top surface of the barrier layer.
13. The method of claim 12 , wherein the dielectric cap layer is formed after recessing the metal material.
14. The method of claim 8 , wherein the dielectric cap layer remains atop the metal line after recessing the STI structure.
15. The method of claim 8 , wherein the dielectric cap layer is recessed simultaneously with recessing the STI structure.
16. The method of claim 8 , further comprising:
after recessing the STI structure, etching the dielectric cap layer to expose the metal line; and
after etching the dielectric cap layer, forming a metal material that extends upwardly from the metal line to a position higher than a top surface of the fin.
17. The method of claim 16 , wherein forming the metal material is performed such that the metal material extends laterally across the fin.
18. The method of claim 16 , wherein etching the dielectric cap layer is performed such that a top corner portion of the metal line is removed.
19. The method of claim 16 , further comprising:
etching the metal material to separate the metal material into metal segments; and
forming an isolation structure between the metal segments.
20. The method of claim 19 , wherein etching the metal material is performed such that the dielectric cap layer is removed.